Gray-code input DAC architecture for clean signal generation. - Richen Jiang; Gopal Adhikari; Yifei Sun 001; Dan Yao; Rino Takahashi; Yuki Ozawa; Nobukazu Tsukiji; Haruo Kobayashi 001; Ryoji Shiota (ISPACS, 2017)

SAR TDC architecture for one-shot timing measurement with full digital implementation. - Yuki Ozawa; Takashi Ida; Shotaro Sakurai; Richen Jiang; Rino Takahashi; Haruo Kobayashi 001; Ryoji Shiota (ISPACS, 2017)