Design and analysis of program counter using finite state machine and incrementer based logic. - M. Divya; Ritesh Belgudri; V. S. Kanchana Bhaaskaran (ICACCI, 2014)

Low Power, High Speed and Area Efficient Binary Count Multiplier. - Kore Sagar Dattatraya; Ritesh Belgudri; Ramdas Bhanudas Khaladkar; V. S. Kanchana Bhaaskaran (J. Circuits Syst. Comput., 2016)