APPLES: A Full Gate-Timing FPGA-Based Hardware Simulator. - Damian Dalton; Vivian Bessler; Jeffrey Griffiths; Andrew McCarthy; Abhay Vadher; Rory O'Kane; Rob Quigley; Declan O'Connor (FPL, 2003)

Reducing the Communication Bottleneck via On-Chip Cosimulation of Gate-Level HDL and C-Models on a Hardware Accelerator. - Alexander Maili; Christian Steger; Reinhold Weiss; Rob Quigley; Damian Dalton (ISVLSI, 2005)

[Poster] Using an Industry-Ready AR HMD on a Real Maintenance Task: AR Benefits Performance on Certain Task Steps More Than Others. - Andrew Pringle; Abraham G. Campbell; Stefanie Hutka; Alberto Torrasso; Colin Couper; Fabian Strunden; Ján Bajana; Kamil Jastzab; Ralph Croly; Rob Quigley; Ross McKiernan; Paul Sweeney; et al. (ISMAR Adjunct, 2018)