A Monolithic Asynchronous Sample-Rate Converter for Digital Audio. - Robert Adams 001; Tom Kwan (ISCAS, 1993)

A stereo asynchronous digital sample-rate converter for digital audio. - Robert Adams 001; Tom Kwan (IEEE J. Solid State Circuits, 1994)

A stereo multibit ΣΔ DAC with asynchronous master-clock interface. - Tom Kwan; Robert Adams 001; Robert Libert (IEEE J. Solid State Circuits, 1996)

A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling. - Robert Adams 001; Khiem Nguyen; Karl Sweetland (IEEE J. Solid State Circuits, 1998)

A 105 dB SNR multibit ΣΔ ADC for digital audio applications. - Khiem Nguyen; Bob Adams 001; Karl Sweetland (CICC, 2001)

Integrated stereo ΔΣ class D amplifier. - Eric Gaalaas; Bill Yang Liu; Naoaki Nishimura; Robert Adams 001; Karl Sweetland (IEEE J. Solid State Circuits, 2005)

A 106-dB SNR hybrid oversampling analog-to-digital converter for digital audio. - Khiem Nguyen; Robert Adams 001; Karl Sweetland; Huaijin Chen 004 (IEEE J. Solid State Circuits, 2005)

A 108dB SNR 1.1mW Oversampling Audio DAC with a Three-Level DEM Technique. - Khiem Nguyen; Abhishek Bandyopadhyay; Bob Adams 001; Karl Sweetland; Paul Baginski (ISSCC, 2008)

A 108 dB SNR, 1.1 mW Oversampling Audio DAC With A Three-level DEM Technique. - Khiem Nguyen; Abhishek Bandyopadhyay; Bob Adams 001; Karl Sweetland; Paul Baginski (IEEE J. Solid State Circuits, 2008)

A 97.3 dB SNR, 600 kHz BW, 31mW multibit continuous time ΔΣ ADC. - Abhishek Bandyopadhyay; Robert Adams 001; Khiem Nguyen; Paul Baginski; David Lamb; Thomas Tansley (VLSIC, 2014)

Subtractive dithering technique for delta-sigma modulator. - Zhichao Tan; Roberto Maurino; Robert Adams 001; Khiem Nguyen (ISCAS, 2017)

A 6 $ mu$ W 95 dB SNDR Inverter Based $ Sigma Delta$ Modulator With Subtractive Dithering and SAR Quantizer. - Huajun Zhang 001; Zhichao Tan; Yi Zhang; Baozhen Chen; Roberto Maurino; Robert Adams 001; Khiem Nguyen (IEEE Trans. Circuits Syst. II Express Briefs, 2019)