ADI's revolutionary BF60x vision focused digital signal processor system on chip: 25 billion operations/sec @ 80 mW and zero bandwidth. - Robert Bushey (Hot Chips Symposium, 2012)

Flexible function-level acceleration of embedded vision applications using the Pipelined Vision Processor. - Robert Bushey; Hamed Tabkhi; Gunar Schirner (ACSSC, 2013)

Algorithm and architecture co-design of Mixture of Gaussian (MoG) background subtraction for embedded vision. - Hamed Tabkhi; Robert Bushey; Gunar Schirner (ACSSC, 2013)

Function-Level Processor (FLP): Raising efficiency by operating at function granularity for market-oriented MPSoC. - Hamed Tabkhi; Robert Bushey; Gunar Schirner (ASAP, 2014)

Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs. - Hamed Tabkhi; Robert Bushey; Gunar Schirner (IEEE Embed. Syst. Lett., 2014)

Conceptual Abstraction Levels (CALs) for managing design complexity of market-oriented MPSoCs. - Hamed Tabkhi; Robert Bushey; Gunar Schirner (Microprocess. Microsystems, 2015)

Function-Level Processor (FLP): A Novel Processor Class for Efficient Processing of Streaming Applications. - Hamed Tabkhi; Robert Bushey; Gunar Schirner (J. Signal Process. Syst., 2016)