An optically programmed neural network. - C. D. Kornfield; Robert C. Frye; Chee C. Wong; Edward A. Rietman (ICNN, 1988)

A large hybrid electro-optic computer for neural network applications. - C. D. Kornfeld; Robert C. Frye; Chee C. Wong; Edward A. Rietman (Neural Networks, 1988)

Computation of proximity effect corrections in electron beam lithography by a neural network. - Robert C. Frye; Edward A. Rietman; Kevin D. Cummings (IJCNN, 1990)

Proximity Effect Corrections in Electron Beam Lithography. - Robert C. Frye; Kevin D. Cummings; Edward A. Rietman (NIPS, 1990)

Neural Control of a Nonlinear System with Inherent Time Delays. - Edward A. Rietman; Robert C. Frye (Conference on Analysis of Neural Network Applications, 1991)

Back-propagation learning and nonidealities in analog neural network hardware. - Robert C. Frye; Edward A. Rietman; Chee C. Wong (IEEE Trans. Neural Networks, 1991)

Process models and network complexity. - Edward A. Rietman; Robert C. Frye; Earl R. Lory (ICNN, 1993)

Trends in Silicon-On-Silicon Multichip Modules. - Robert C. Frye; King L. Tai; Maureen Y. Lau; Thaddeus J. Gabara (IEEE Des. Test Comput., 1993)

Integration and electrical isolation in CMOS mixed-signal wireless chips. - Robert C. Frye (Proc. IEEE, 2001)

A 2GHz quadrature hybrid implemented in CMOS technology. - Robert C. Frye; Sharad Kapur; Robert C. Melville (CICC, 2002)

Differentially "bathtub"-tuned CMOS VCO using inductively coupled varactors. - Sander L. J. Gierkink; Robert C. Frye; Vito Boccuzzi (ESSCIRC, 2003)

A 2-GHz quadrature hybrid implemented in CMOS technology. - Robert C. Frye; Sharad Kapur; Robert C. Melville (IEEE J. Solid State Circuits, 2003)

A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling. - Sander L. J. Gierkink; Salvatore Levantino; Robert C. Frye; Carlo Samori; Vito Boccuzzi (IEEE J. Solid State Circuits, 2003)

A 3.5GHz integer-N PLL with dual on-chip loop filters and VCO tune ports for fast low-IF/zero-IF LO switching in an 802.11 transceiver. - Sander L. J. Gierkink; Dandan Li; Robert C. Frye; Vito Boccuzzi (CICC, 2004)

A robust 43-GHz VCO in CMOS for OC-768 SONET applications. - Arnoud P. van der Wel; Sander L. J. Gierkink; Robert C. Frye; Vito Boccuzzi; Bram Nauta (IEEE J. Solid State Circuits, 2004)

A 3.5-GHz PLL for fast low-IF/zero-IF LO switching in an 802.11 transceiver. - Sander L. J. Gierkink; Dandan Li; Robert C. Frye; Vito Boccuzzi (IEEE J. Solid State Circuits, 2005)

Synthesis of Optimal On-Chip Baluns. - Sharad Kapur; David E. Long; Robert C. Frye; Yu-Chia Chen; Ming-Hsiang Cho; Huai-Wen Chang; Jun-Hong Ou; Bigchoug Hung (CICC, 2007)