Compressed sensing of EEG using a random sampling ADC in 90nm CMOS. - Robert D'Angelo; Michael Trakimas; Sameer R. Sonkusale; Shuchin Aeron (BSN, 2013)

Experimental results on wideband spectrum sensing using random sampling ADC in 90nm CMOS. - Robert D'Angelo; Michael Trakimas; Shuchin Aeron; Sameer R. Sonkusale (ISCAS, 2013)

A Compressed Sensing Analog-to-Information Converter With Edge-Triggered SAR ADC Core. - Michael Trakimas; Robert D'Angelo; Shuchin Aeron; Timothy M. Hancock; Sameer R. Sonkusale (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

A time-mode translinear principle for implementing analog multiplication. - Robert D'Angelo; Sameer R. Sonkusale (ISCAS, 2014)

A Time-Mode Translinear Principle for Nonlinear Analog Computation. - Robert D'Angelo; Sameer R. Sonkusale (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Three dimensional graphene scaffold for cardiac tissue engineering and in-situ electrical recording. - Shideh K. Ameri; P. K. Singh; Robert D'Angelo; Whitney Stoppel; Lauren Black; Sameer R. Sonkusale (EMBC, 2016)

Precise time mode multiplier using digital primitives and passive components. - Robert D'Angelo; Sameer R. Sonkusale (ISCAS, 2016)

An Analog Visual Saliency Processor using Time-mode Computation. - Robert D'Angelo; Brent Hollosi; Wes Uy; Haiyao Huang; Dorothy C. Poppe; Sameer Sonkusale (ISCAS, 2018)

A Computationally Efficient Visual Saliency Algorithm Suitable for an Analog CMOS Implementation. - Robert D'Angelo; Richard Wood; Nathan Lowry; Geremy Freifeld; Haiyao Huang; Christopher D. Salthouse; Brent Hollosi; Matthew Muresan; Wes Uy; Nhut Tran; Armand Chery; Dorothy C. Poppe; et al. (Neural Comput., 2018)

Process Scalability of Pulse-Based Circuits for Analog Image Convolution. - Robert D'Angelo; Xiaocong Du; Christopher D. Salthouse; Brent Hollosi; Geremy Freifeld; Wes Uy; Haiyao Huang; Nhut Tran; Armand Chery; Jae-sun Seo; Yu Cao 001; Dorothy C. Poppe; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)