FPGA implementation of a nonlinear two dimensional fuzzy filter. - Justin G. R. Delva; Ali M. Reza; Robert D. Turney (ICASSP, 1999)

FPGA implementation of adaptive temporal Kalman filter for real time video filtering. - Robert D. Turney; Ali M. Reza; Justin G. R. Delva (ICASSP, 1999)

High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder. - Massimo Ravasi; Marco Mattavelli; Paul R. Schumacher; Robert D. Turney (PATMOS, 2003)

Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs. - Kristof Denolf; Adrian Chirila-Rus; Robert D. Turney; Paul R. Schumacher; Kees A. Vissers (FPL, 2005)

A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications. - Paul R. Schumacher; Kristof Denolf; Adrian Chirila-Rus; Robert D. Turney; Nick Fedele; Kees A. Vissers; Jan Bormans (ICIP (2), 2005)

A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs. - Paul R. Schumacher; Marco Mattavelli; Adrian Chirila-Rus; Robert D. Turney (ICME, 2005)

A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs. - Paul R. Schumacher; Marco Mattavelli; Adrian Chirila-Rus; Robert D. Turney (IWSOC, 2005)

Introduction to the Special Issue on Integrated Multimedia Platforms. - T. Chiang; Marco Mattavelli; Robert D. Turney (IEEE Trans. Circuits Syst. Video Technol., 2005)

Memory Centric Design of an MPEG-4 Video Encoder. - Kristof Denolf; Christophe De Vleeschouwer; Robert D. Turney; Gauthier Lafruit; Jan Bormans (IEEE Trans. Circuits Syst. Video Technol., 2005)

A Prototyping Co-design Platform with A Simplified Architecture for Video Codec Implementation. - Yifeng Qiu; Wael M. Badawy; Robert D. Turney (ISCAS, 2007)

A Systematic Approach to Design Low-Power Video Codec Cores. - Kristof Denolf; Adrian Chirila-Rus; Paul R. Schumacher; Robert D. Turney; Kees A. Vissers; Diederik Verkest; Henk Corporaal (EURASIP J. Embed. Syst., 2007)

A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach. - Ihab Amer; Wael M. Badawy; Graham A. Jullien; Marco Mattavelli; Robert D. Turney (J. Circuits Syst. Comput., 2007)

An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation. - Yifeng Qiu; Wael M. Badawy; Robert D. Turney (J. Signal Process. Syst., 2009)

Cost optimization of combined building heating/cooling equipment via mixed-integer linear programming. - Michael J. Risbeck; Christos T. Maravelias; James B. Rawlings; Robert D. Turney (ACC, 2015)

Distributed economic model predictive control for large-scale building temperature regulation. - Nishith R. Patel; Michael J. Risbeck; James B. Rawlings; Michael J. Wenzel; Robert D. Turney (ACC, 2016)

Economic MPC and real-time decision making with application to large-scale HVAC energy systems. - James B. Rawlings; Nishith R. Patel; Michael J. Risbeck; Christos T. Maravelias; Michael J. Wenzel; Robert D. Turney (Comput. Chem. Eng., 2018)

Mixed-integer optimization methods for online scheduling in large-scale HVAC systems. - Michael J. Risbeck; Christos T. Maravelias; James B. Rawlings; Robert D. Turney (Optim. Lett., 2020)