On Meije and SCCS: Infinite Sum Operators VS. Non-Guarded Definitions. - Robert de Simone (Theor. Comput. Sci., 1984)

Langages Infinitaires et Produit de Mixage. - Robert de Simone (Theor. Comput. Sci., 1984)

Petri Nets and Algebraic Calculi of Processes. - Gérard Boudol; Gérard Roucairol; Robert de Simone (STACS, 1985)

Higher-Level Synchronising Devices in Meije-SCCS. - Robert de Simone (Theor. Comput. Sci., 1985)

Process Calculi, from Theory to Practice: Verification Tools. - Gérard Boudol; Valérie Roy; Robert de Simone; Didier Vergamini (Automatic Verification Methods for Finite State Systems, 1989)

Causal Models for Rational Algebraic Processes. - Amar Bouali; Robert de Simone (CONCUR, 1991)

The ESTEREL language. - Frédéric Boussinot; Robert de Simone (Proc. IEEE, 1991)

Symbolic Bisimulation Minimisation. - Amar Bouali; Robert de Simone (CAV, 1992)

Auto/Autograph. - Valérie Roy; Robert de Simone (Formal Methods Syst. Des., 1992)

Compositional Semantics of ESTEREL and Verification by Compositional Reductions. - Robert de Simone; Annie Ressouche (CAV, 1994)

Model-Based Verification Methods and Tools (Abstract). - Jean-Claude Fernandez; Joseph Sifakis; Robert de Simone (CONCUR, 1994)

Using PO Methods for Verfying Behavioural Equivalences. - Monica Lara de Souza; Robert de Simone (FORTE, 1995)

The FC2TOOLS Set. - Amar Bouali; Annie Ressouche; Valérie Roy; Robert de Simone (CAV, 1996)

Verifying Synchronous Reactive Systems Programmed in ESTEREL. - Amar Bouali; Jean-Paul Marmorat; Robert de Simone; Horia Toma (FTRTFT, 1996)

The FC2TOOLS Set (Tool Demonstration). - Amar Bouali; Annie Ressouche; Valérie Roy; Robert de Simone (TACAS, 1996)

Automated design of communication protocols using ESTEREL. - Christophe Diot; Robert de Simone; Christian Huitema (J. High Speed Networks, 1996)

The SL Synchronous Language. - Frédéric Boussinot; Robert de Simone (IEEE Trans. Software Eng., 1996)

ESTEREL: a formal method applied to avionic software development. - Gérard Berry; Amar Bouali; Xavier Fornari; Emmanuel Ledinot; Eric Nassor; Robert de Simone (Sci. Comput. Program., 2000)

Ninth International Conference on Concurrency Theory 1998 - Editorial. - Davide Sangiorgi; Robert de Simone (Theor. Comput. Sci., 2002)

Optimizations for Faster Execution of Esterel Programs. - Dumitru Potop-Butucaru; Robert de Simone (MEMOCODE, 2003)

Instantaneous Termination in Pure Esterel. - Olivier Tardieu; Robert de Simone (SAS, 2003)

The synchronous languages 12 years later. - Albert Benveniste; Paul Caspi; Stephen A. Edwards; Nicolas Halbwachs; Paul Le Guernic; Robert de Simone (Proc. IEEE, 2003)

Curing schizophrenia by program rewriting in Esterel. - Olivier Tardieu; Robert de Simone (MEMOCODE, 2004)

Syntax-driven Behavior Partitioning for Model-checking of Esterel Programs. - Eric Vecchié; Robert de Simone (SLAP@ETAPS, 2004)

Syntax-Driven Reachable State Space Construction of Synchronous Reactive Programs. - Eric Vecchié; Robert de Simone (CAV, 2005)

P2I: An Innovative MDA Methodology for Embedded Real-Time System. - Arnaud Cuccuru; Robert de Simone; Thierry Saunier; Günther Siegel; Yves Sorel (DSD, 2005)

Another Glance at Relay Stations in Latency-Insensitive Design. - Julien Boucaron; Jean-Vivien Millo; Robert de Simone (FMGALS@MEMOCODE, 2005)

Guidelines for a graduate curriculum on embedded software and systems. - Paul Caspi; Alberto L. Sangiovanni-Vincentelli; Luís Almeida 001; Albert Benveniste; Bruno Bouyssounouse; Giorgio C. Buttazzo; Ivica Crnkovic; Werner Damm; Jakob Engblom; Gerhard Fohler; Marisol García-Valls; Hermann Kopetz; et al. (ACM Trans. Embed. Comput. Syst., 2005)

Loops in esterel. - Olivier Tardieu; Robert de Simone (ACM Trans. Embed. Comput. Syst., 2005)

The Synchronous Hypothesis and Synchronous Languages. - Robert de Simone; Jean-Pierre Talpin; Dumitru Potop-Butucaru (Embedded Systems Handbook, 2005)

Latency-insensitive design and central repetitive scheduling. - Julien Boucaron; Robert de Simone; Jean-Vivien Millo (MEMOCODE, 2006)

Syntax-driven optimisations for reachable state space construction of ESTEREL programs. - Eric Vecchié; Robert de Simone (Int. J. Embed. Syst., 2006)

Towards a "Synchronous Reactive" UML profile? - Robert de Simone; Charles André (Int. J. Softw. Tools Technol. Transf., 2006)

Necessary and sufficient conditions for deterministic desynchronization. - Dumitru Potop-Butucaru; Robert de Simone; Yves Sorel (EMSOFT, 2007)

Modeling of immediate vs. delayed data communications: from AADL to UML Marte. - Frédéric Mallet; Charles André; Robert de Simone (FDL, 2007)

Time Modeling in MARTE. - Robert de Simone; Charles André (FDL, 2007)

MARTE: Also an UML Profile for Modeling AADL Applications. - Madeleine Faugère; Thimothée Bourbeau; Robert de Simone; Sébastien Gérard (ICECCS, 2007)

Modeling Time(s). - Charles André; Frédéric Mallet; Robert de Simone (MoDELS, 2007)

Formal Methods for Scheduling of Latency-Insensitive Designs. - Julien Boucaron; Robert de Simone; Jean-Vivien Millo (EURASIP J. Embed. Syst., 2007)

Preface. - Alain Girault; Robert de Simone (FMGALS@MEMOCODE, 2007)

MARTE vs. AADL for Discrete-Event and Discrete-Time Domains. - Frédéric Mallet; Robert de Simone (FDL (Selected Papers), 2008)

Event-Triggered vs. Time-Triggered Communications with UML MARTE. - Frédéric Mallet; Robert de Simone; Laurent Rioux (FDL, 2008)

Dealing with AADL End-to-End Flow Latency with UML MARTE. - Su-Young Lee 002; Frédéric Mallet; Robert de Simone (ICECCS, 2008)

MARTE: a profile for RT/E systems modeling, analysis-and simulation? - Frédéric Mallet; Robert de Simone (SimuTools, 2008)

Synchronous Hypothesis and Polychronous Languages. - Dumitru Potop-Butucaru; Robert de Simone; Jean-Pierre Talpin (Embedded Systems Design and Verification, 2009)

Clock-driven distributed real-time implementation of endochronous synchronous programs. - Dumitru Potop-Butucaru; Robert de Simone; Yves Sorel; Jean-Pierre Talpin (EMSOFT, 2009)

IP-XACT components with abstract time characterization. - Aamir Mehut Khan; Frédéric Mallet; Charles André; Robert de Simone (FDL, 2009)

Latency-Insensitive Design: Retry Relay-Station and Fusion Shell. - Julien Boucaron; Anthony Coadou; Robert de Simone (FMGALS@DATE, 2009)

The Time Model of Logical Clocks Available in the OMG MARTE Profile. - Charles André; Julien DeAntoni; Frédéric Mallet; Robert de Simone (Synthesis of Embedded Software, 2010)

Formal Modeling of Embedded Systems with Explicit Schedules and Routes. - Julien Boucaron; Anthony Coadou; Robert de Simone (Synthesis of Embedded Software, 2010)

From Synchronous Specifications to Statically Scheduled Hard Real-Time Implementations. - Dumitru Potop-Butucaru; Robert de Simone; Yves Sorel (Synthesis of Embedded Software, 2010)

Polychronous Analysis of Timing Constraints in UML MARTE. - Huafeng Yu; Jean-Pierre Talpin; Loïc Besnard; Thierry Gautier; Frédéric Mallet; Charles André; Robert de Simone (ISORC Workshops, 2010)

The clock constraint specification language for building timed causality models - Application to synchronous data flow graphs. - Frédéric Mallet; Julien DeAntoni; Charles André; Robert de Simone (Innov. Syst. Softw. Eng., 2010)

Introduction to special issue: papers from UML&FM'2009. - Isabelle Perseil; Jean-Michel Bruel; Agusti Canals; Robert de Simone; Sébastien Gérard; Elie Najm (Innov. Syst. Softw. Eng., 2010)

From Concurrent Multi-clock Programs to Deterministic Asynchronous Implementations. - Dumitru Potop-Butucaru; Yves Sorel; Robert de Simone; Jean-Pierre Talpin (Fundam. Informaticae, 2011)

Logical time: specification vs. implementation. - Frédéric Mallet; Charles André; Robert de Simone (ACM SIGSOFT Softw. Eng. Notes, 2011)

Programmable routers for efficient mapping of applications onto NoC-based MPSoCs. - Manel Djemal; Robert de Simone; François Pêcheux; Franck Wajsbürt; Dumitru Potop-Butucaru; Zhen Zhang (DASIP, 2012)

Periodic scheduling of marked graphs using balanced binary words. - Jean-Vivien Millo; Robert de Simone (Theor. Comput. Sci., 2012)

Schedulability Analysis with CCSL Specifications. - Ling Yin 002; Jing Liu 012; Zuohua Ding; Frédéric Mallet; Robert de Simone (APSEC (1), 2013)

Safe CCSL specifications and marked graphs. - Frédéric Mallet; Jean-Vivien Millo; Robert de Simone (MEMOCODE, 2013)

Explicit routing schemes for implementation of cellular automata on processor arrays. - Jean-Vivien Millo; Robert de Simone (Nat. Comput., 2013)

Static Mapping of Real-Time Applications onto Massively Parallel Processor Arrays. - Thomas Carle; Manel Djemal; Dumitru Potop-Butucaru; Robert de Simone; Zhen Zhang (ACSD, 2014)

Execution of heterogeneous models for thermal analysis with a multi-view approach. - Amani Khecharem; Carlos Gomez; Julien Deantoni; Frédéric Mallet; Robert de Simone (FDL, 2014)

Reconciling performance and predictability on a many-core through off-line mapping. - Thomas Carle; Manel Djemal; Daniela Genius; François Pêcheux; Dumitru Potop-Butucaru; Robert de Simone; Franck Wajsbürt; Zhen Zhang (ReCoSoC, 2014)

On the Scalability of Constraint Solving for Static/Off-Line Real-Time Scheduling. - Raul Gorcitz; Emilien Kofman; Thomas Carle; Dumitru Potop-Butucaru; Robert de Simone (FORMATS, 2015)

Efficient FFT mapping on GPU for radar processing application: modeling and implementation. - Mohamed Amine Bergach; Emilien Kofman; Robert de Simone; Serge Tissot; Michel Syska (CoRR, 2015)

Correctness issues on MARTE/CCSL constraints. - Frédéric Mallet; Robert de Simone (Sci. Comput. Program., 2015)

Modeling and Analyzing Dataflow Applications on NoC-Based Many-Core Architectures. - Jean-Vivien Millo; Emilien Kofman; Robert de Simone (ACM Trans. Embed. Comput. Syst., 2015)

Using SystemC Cyber Models in an FMI Co-Simulation Environment: Results and Proposed FMI Enhancements. - Stefano Centomo; Julien Deantoni; Robert de Simone (DSD, 2016)

A formal approach to the mapping of tasks on an heterogenous multicore, energy-aware architecture. - Emilien Kofman; Robert de Simone (MEMOCODE, 2016)

Keynote talk II: Multiform logical time for Me/Mo-codesign. - Robert de Simone (MEMOCODE, 2016)

Divergence Detection for CCSL Specification via Clock Causality Chain. - Qingguo Xu; Robert de Simone; Julien DeAntoni (SETTA, 2016)

Instant-Based and State-Based Analysis of Infinite Logical Clock. - Qingguo Xu; Huaikou Miao; Robert de Simone; Julien DeAntoni (SOFL+MSVL, 2016)

Explicit Control of Dataflow Graphs with MARTE/CCSL. - Jean-Vivien Millo; Amine Oueslati; Emilien Kofman; Julien DeAntoni; Frédéric Mallet; Robert de Simone (MODELSWARD, 2017)

Time in SCCharts. - Alexander Schulz-Rosengarten; Reinhard von Hanxleden; Frédéric Mallet; Robert de Simone; Julien Deantoni (FDL, 2018)

Beyond Time-Triggered Co-simulation of Cyber-Physical Systems for Performance and Accuracy Improvements. - Giovanni Liboni; Julien Deantoni; Antonio Portaluri; Davide Quaglia; Robert de Simone (RAPIDO, 2018)

Multiform Logical Time & Space for Mobile Cyber-Physical System With Automated Driving Assistance System. - Qian Liu; Robert de Simone; Xiaohong Chen 007; Jiexiang Kang; Jing Liu 012; Wei Yin; Hui Wang (APSEC, 2020)

Multiform Logical Time & Space for Specification of Automated Driving Assistance Systems: Work-in-Progress. - Qian Liu; Robert de Simone; Xiaohong Chen 007; Jing Liu 012 (EMSOFT, 2020)

Semantics foundations of PsyC based on synchronous Logical Execution Time. - Fabien Siron; Dumitru Potop-Butucaru; Robert de Simone; Damien Chabrol; Amira Methni (CPS-IoT Week Workshops, 2023)

Probabilistic Modeling of Spiking Neural Networks with Contract-Based Verification. - Zhen Yao; Elisabetta De Maria; Robert de Simone (CoRR, 2025)