IBM zEC12 processor subsystem. - Robert J. Sonnelitter (Hot Chips Symposium, 2013)

The IBM z13 processor cache subsystem. - Craig R. Walters; Pak-kin Mak; Deanna Postles Dunn Berger; Michael A. Blake; Tim Bronson; K. D. Klapproth; A. J. O'Neill; Robert J. Sonnelitter; Vesselina K. Papazova (IBM J. Res. Dev., 2015)

IBM z14™: 14nm microprocessor for the next-generation mainframe. - Christopher J. Berry; James D. Warnock; John Isakson; John Badar; Brian Bell 001; Frank Malgioglio; Guenter Mayer; Dina Hamid; Jesse Surprise; David Wolpert 001; Ofer Geva; Bill Huott; et al. (ISSCC, 2018)

Design of the IBM z14 microprocessor. - Christian Jacobi 002; Anthony Saporito; Martin Recktenwald; Aaron Tsai; Ulrich Mayer; Markus M. Helms; Adam Collura; Pak-kin Mak; Robert J. Sonnelitter; Michael A. Blake; Tim Bronson; Arthur O'neill; et al. (IBM J. Res. Dev., 2018)

Design of the IBM z15 microprocessor. - Anthony Saporito; Martin Recktenwald; Christian Jacobi 002; Gerrit Koch; Deanna Postles Dunn Berger; Robert J. Sonnelitter; Craig R. Walters; Jang-Soo Lee; Cédric Lichtenau; Ulrich Mayer; Eduard Herkel; Stefan Payer; et al. (IBM J. Res. Dev., 2020)

IBM Telum: a 16-Core 5+ GHz DCM. - Ofer Geva; Christopher J. Berry; Robert J. Sonnelitter; David Wolpert 001; Adam Collura; Thomas Strach; Di Phan; Cédric Lichtenau; Alper Buyuktosunoglu; Hubert Harrer; Jeffrey A. Zitz; Chad Marquart; et al. (ISSCC, 2022)

Enterprise-Class Multilevel Cache Design: Low Latency, Huge Capacity, and High Reliability. - Deanna Postles Dunn Berger; Christian Jacobi 002; Craig R. Walters; Robert J. Sonnelitter; Mike Cadigan; Matthias Klein (IEEE Micro, 2023)

Enterprise Class Modular Cache Hierarchy. - Craig R. Walters; Deanna Postles Dunn Berger; Robert J. Sonnelitter; Alper Buyuktosunoglu (HPCA, 2025)

2.2 IBM Telum II: Next Generation 5.5GHz Microprocessor with On-Die Data Processing Unit and Improved AI Accelerator. - Gerald Strevig; Christopher J. Berry; Rahul M. Rao; Noam Jungmann; Michael A. Sperling; Michael J. Becht; Eduard Herkel; Matthias Pflanz; Patrick J. Meaney; Michael Romain; Mark Cichanowski; Amanda Venton; et al. (ISSCC, 2025)

The IBM Telum II Processor. - Christopher J. Berry; Michael J. Becht; Tim E. Bubb; Howard Haynie; Robert J. Sonnelitter; Katie Seggerman; Jonathan Hsieh; Edward Malley; Mike Cadigan; Susan M. Eickhoff; Matthias Klein; Craig R. Walters; et al. (IEEE Micro, 2025)