Overcoming single-thread performance hurdles in the core fusion reconfigurable multicore architecture. - Janani Mukundan; Saugata Ghose; Robert Karmazin; Engin Ipek; José F. Martínez (ICS, 2012)

cellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells. - Robert Karmazin; Carlos Tadeo Ortega Otero; Rajit Manohar (ASYNC, 2013)

A split-foundry asynchronous FPGA. - Benjamin Hill 001; Robert Karmazin; Carlos Tadeo Ortega Otero; Jonathan Tse; Rajit Manohar (CICC, 2013)

Neural spiking dynamics in asynchronous digital circuits. - Nabil Imam; Kyle Wecker; Jonathan Tse; Robert Karmazin; Rajit Manohar (IJCNN, 2013)

ULSNAP: An ultra-low power event-driven microcontroller for sensor network nodes. - Carlos Tadeo Ortega Otero; Jonathan Tse; Robert Karmazin; Benjamin Hill 001; Rajit Manohar (ISQED, 2014)

Timing Driven Placement for Quasi Delay-Insensitive Circuits. - Robert Karmazin; Stephen Longfield Jr.; Carlos Tadeo Ortega Otero; Rajit Manohar (ASYNC, 2015)

Automatic obfuscated cell layout for trusted split-foundry design. - Carlos Tadeo Ortega Otero; Jonathan Tse; Robert Karmazin; Benjamin Hill 001; Rajit Manohar (HOST, 2015)

Clock Generator with Clock Domain Crossing. - Robert Karmazin; Andrew Lines; Prasad Joshi; Benjamin Hill 001 (ASYNC, 2025)