The CHERI capability model: Revisiting RISC in an age of risk. - Jonathan Woodruff; Robert N. M. Watson; David Chisnall; Simon W. Moore; Jonathan Anderson; Brooks Davis; Ben Laurie; Peter G. Neumann; Robert M. Norton; Michael Roe (ISCA, 2014)

CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization. - Robert N. M. Watson; Jonathan Woodruff; Peter G. Neumann; Simon W. Moore; Jonathan Anderson; David Chisnall; Nirav H. Dave; Brooks Davis; Khilan Gudka; Ben Laurie; Steven J. Murdoch; Robert M. Norton; et al. (IEEE Symposium on Security and Privacy, 2015)

Fast Protection-Domain Crossing in the CHERI Capability-System Architecture. - Robert N. M. Watson; Robert M. Norton; Jonathan Woodruff; Simon W. Moore; Peter G. Neumann; Jonathan Anderson; David Chisnall; Brooks Davis; Ben Laurie; Michael Roe; Nirav H. Dave; Khilan Gudka; et al. (IEEE Micro, 2016)

CHERI JNI: Sinking the Java Security Model into the C. - David Chisnall; Brooks Davis; Khilan Gudka; David Brazdil; Alexandre Joannou; Jonathan Woodruff; A. Theodore Markettos; J. Edward Maste; Robert M. Norton; Stacey D. Son; Michael Roe; Simon W. Moore; et al. (ASPLOS, 2017)

CheriABI: Enforcing Valid Pointer Provenance and Minimizing Pointer Privilege in the POSIX C Run-time Environment. - Brooks Davis; Robert N. M. Watson; Alexander Richardson 001; Peter G. Neumann; Simon W. Moore; John Baldwin; David Chisnall; Jessica Clarke 001; Nathaniel Wesley Filardo; Khilan Gudka; Alexandre Joannou; Ben Laurie; et al. (ASPLOS, 2019)

ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS. - Alasdair Armstrong; Thomas Bauereiss; Brian Campbell 001; Alastair Reid 001; Kathryn E. Gray; Robert M. Norton; Prashanth Mundkur; Mark Wassell; Jon French; Christopher Pulte; Shaked Flur; Ian Stark; et al. (Proc. ACM Program. Lang., 2019)

CHERI Concentrate: Practical Compressed Capabilities. - Jonathan Woodruff; Alexandre Joannou; Hongyan Xia; Anthony C. J. Fox; Robert M. Norton; David Chisnall; Brooks Davis; Khilan Gudka; Nathaniel Wesley Filardo; A. Theodore Markettos; Michael Roe; Peter G. Neumann; et al. (IEEE Trans. Computers, 2019)

Cornucopia: Temporal Safety for CHERI Heaps. - Nathaniel Wesley Filardo; Brett F. Gutstein; Jonathan Woodruff; Sam Ainsworth; Lucian Paul-Trifu; Brooks Davis; Hongyan Xia; Edward Tomasz Napierala; Alexander Richardson 001; John Baldwin; David Chisnall; Jessica Clarke 001; et al. (SP, 2020)

Rigorous engineering for hardware security: Formal modelling and proof in the CHERI design and implementation process. - Kyndylan Nienhuis; Alexandre Joannou; Thomas Bauereiss; Anthony C. J. Fox; Michael Roe; Brian Campbell 001; Matthew Naylor; Robert M. Norton; Simon W. Moore; Peter G. Neumann; Ian Stark; Robert N. M. Watson; et al. (SP, 2020)

CHERIoT: Complete Memory Safety for Embedded Devices. - Saar Amar; David Chisnall; Tony Chen; Nathaniel Wesley Filardo; Ben Laurie; Kunyan Liu; Robert M. Norton; Simon W. Moore; Yucong Tao; Robert N. M. Watson; Hongyan Xia (MICRO, 2023)

Cornucopia Reloaded: Load Barriers for CHERI Heap Temporal Safety. - Nathaniel Wesley Filardo; Brett F. Gutstein; Jonathan Woodruff; Jessica Clarke 001; Peter Rugg; Brooks Davis; Mark Johnston; Robert M. Norton; David Chisnall; Simon W. Moore; Peter G. Neumann; Robert N. M. Watson (ASPLOS (2), 2024)