Architecture of Warp. - Marco Annaratone; Emmanuel A. Arnould; Robert Cohn; Thomas R. Gross; H. T. Kung 001; Monica S. Lam; Onat Menzilcioglu; Ken Sarocky; John Senko; Jon A. Webb (COMPCON, 1987)

Programming Warp. - Bernd Bruegge; Chang-Hsin Chang; Robert Cohn; Thomas R. Gross; Monica S. Lam; Peter Lieu; Abu Noaman; David Yam (COMPCON, 1987)

Warp: an integrated solution of high-speed parallel computing. - Shekhar Borkar; Robert Cohn; George W. Cox; Sha Gleason; Thomas R. Gross (SC, 1988)

Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor. - Robert Cohn; Thomas R. Gross; Monica Lam 001; P. S. Tseng (ASPLOS, 1989)

Supporting Systolic and Memory Communciation in iWarp. - Shekhar Borkar; Robert Cohn; George W. Cox; Thomas R. Gross; H. T. Kung 001; Monica Lam 001; Margie Levine; Brian Moore 004; Wire Moore; Craig Peterson; Jim Susman; Jim Sutton; et al. (ISCA, 1990)

Source Level Debugging of Automatically Parallelized Code. - Robert Cohn (Workshop on Parallel and Distributed Debugging, 1991)

Hot Cold Optimization of Large Windows/NT Applications. - Robert S. Cohn; P. Geoffrey Lowney (MICRO, 1996)

Optimizing Alpha Executables on Windows NT with Spike. - Robert S. Cohn; David W. Goodwin; P. Geoffrey Lowney (Digit. Tech. J., 1998)

Design and Analysis of Profile-Based Optimization in Compaq's Compilation Tools for Alpha. - Robert S. Cohn; P. Geoffrey Lowney (J. Instr. Level Parallelism, 2000)

Code layout optimizations for transaction processing workloads. - Alex Ramírez; Luiz André Barroso; Kourosh Gharachorloo; Robert S. Cohn; Josep Lluís Larriba-Pey; P. Geoffrey Lowney; Mateo Valero (ISCA, 2001)

Profile-guided post-link stride prefetching. - Chi-Keung Luk; Robert Muth; Harish Patil; Richard Weiss 001; P. Geoffrey Lowney; Robert S. Cohn (ICS, 2002)

Ispike: A Post-link Optimizer for the Intel®Itanium®Architecture. - Chi-Keung Luk; Robert Muth; Harish Patil; Robert S. Cohn; P. Geoffrey Lowney (CGO, 2004)

Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation. - Harish Patil; Robert S. Cohn; Mark Charney; Rajiv Kapoor; Andrew Sun; Anand Karunanidhi (MICRO, 2004)

PIN: a binary instrumentation tool for computer architecture research and education. - Vijay Janapa Reddi; Alex Settle; Daniel A. Connors; Robert S. Cohn (WCAE, 2004)

Pin: building customized program analysis tools with dynamic instrumentation. - Chi-Keung Luk; Robert S. Cohn; Robert Muth; Harish Patil; Artur Klauser; P. Geoffrey Lowney; Steven Wallace; Vijay Janapa Reddi; Kim M. Hazelwood (PLDI, 2005)

Introduction to the special issue. - David R. Kaeli; Robert Cohn (SIGARCH Comput. Archit. News, 2005)

Controlling program execution through binary instrumentation. - Heidi Pan; Krste Asanovic; Robert Cohn; Chi-Keung Luk (SIGARCH Comput. Archit. News, 2005)

Persistence in dynamic code transformation systems. - Vijay Janapa Reddi; Dan Connors; Robert S. Cohn (SIGARCH Comput. Archit. News, 2005)

A Cross-Architectural Interface for Code Cache Manipulation. - Kim M. Hazelwood; Robert S. Cohn (CGO, 2006)

Automatic logging of operating system effects to guide application-level architecture simulation. - Satish Narayanasamy; Cristiano Pereira; Harish Patil; Robert Cohn; Brad Calder (SIGMETRICS/Performance, 2006)

Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications. - Vijay Janapa Reddi; Dan Connors; Robert Cohn; Michael D. Smith 001 (CGO, 2007)

VPC prediction: reducing the cost of indirect branches via hardware-based dynamic devirtualization. - Hyesoon Kim; José A. Joao; Onur Mutlu; Chang Joo Lee; Yale N. Patt; Robert Cohn (ISCA, 2007)

08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation. - Erik R. Altman; Bruce R. Childers; Robert S. Cohn; Jack W. Davidson; Koen De Bosschere; Bjorn De Sutter; M. Anton Ertl; Michael Franz; Yuan Xiang Gu; Matthias Hauswirth; Thomas Heinz 001; Wei-Chung Hsu; et al. (Emerging Uses and Paradigms for Dynamic Binary Translation, 2008)

Scalable support for multithreaded applications on dynamic binary instrumentation systems. - Kim M. Hazelwood; Greg Lueck; Robert Cohn (ISMM, 2009)

Virtual Program Counter (VPC) Prediction: Very Low Cost Indirect Branch Prediction Using Conditional Branch Prediction Hardware. - Hyesoon Kim; José A. Joao; Onur Mutlu; Chang Joo Lee; Yale N. Patt; Robert Cohn (IEEE Trans. Computers, 2009)

Selecting Operator Queries Using Expected Myopic Gain. - Robert Cohn; Michael Maxim; Edmund H. Durfee; Satinder Singh 001 (IAT, 2010)

Dynamic program analysis of Microsoft Windows applications. - Alex Skaletsky; Tevi Devor; Nadav Chachmon; Robert S. Cohn; Kim M. Hazelwood; Vladimir Vladimirov; Moshe Bach (ISPASS, 2010)

Analyzing Parallel Programs with Pin. - Moshe Bach; Mark Charney; Robert Cohn; Elena Demikhovsky; Tevi Devor; Kim M. Hazelwood; Aamer Jaleel; Chi-Keung Luk; Gail Lyons; Harish Patil; Ady Tal (Computer, 2010)

Comparing Action-Query Strategies in Semi-Autonomous Agents. - Robert Cohn; Edmund H. Durfee; Satinder Singh 001 (AAAI, 2011)

Portable trace compression through instruction interpretation. - Svilen Kanev; Robert Cohn (ISPASS, 2011)

Characterizing EVOI-Sufficient k-Response Query Sets in Decision Problems. - Robert Cohn; Satinder Singh 001; Edmund H. Durfee (AISTATS, 2014)

Simulation and Analysis Engine for Scale-Out Workloads. - Nadav Chachmon; Daniel Richins; Robert S. Cohn; Magnus Christensson; Wenzhi Cui; Vijay Janapa Reddi (ICS, 2016)

Distributed Ranges: A Model for Distributed Data Structures, Algorithms, and Views. - Benjamin Brock; Robert Cohn; Suyash Bakshi; Tuomas Karna; Jeongnim Kim; Mateusz Nowak 001; Lukasz Slusarczyk; Kacper Stefanski; Timothy G. Mattson (ICS, 2024)