Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. - Robert Schwencker; Josef Eckmüller; Helmut E. Graeb; Kurt Antreich (DATE, 1999)

WiCkeD: analog circuit synthesis incorporating mismatch. - Kurt Antreich; Josef Eckmüller; Helmut Graeb; Michael Pronath; Frank Schenkel; Robert Schwencker; Stephan Zizala (CICC, 2000)

The Generalized Boundary Curve-A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits. - Robert Schwencker; Frank Schenkel; Helmut E. Graeb; Kurt Antreich (DATE, 2000)

Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search. - Frank Schenkel; Michael Pronath; Stephan Zizala; Robert Schwencker; Helmut E. Graeb; Kurt Antreich (DAC, 2001)

Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets. - Robert Schwencker; Frank Schenkel; Michael Pronath; Helmut E. Graeb (DATE, 2002)

High abstraction level permutational ESD concept analysis. - Martin Streibl; Franz Zängl; Kai Esmark; Robert Schwencker; Wolfgang Stadler; Harald Gossner; S. Drüen; Doris Schmitt-Landsiedel (Microelectron. Reliab., 2005)

TLM+ modeling of embedded HW/SW systems. - Wolfgang Ecker; Volkan Esen; Robert Schwencker; Thomas Steininger; Michael Velten (DATE, 2010)