Switch-level simulation and the pass transistor EXOR gate. - Christer Svensson; Robert Tjärnström (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Automatic generation of timing specifications for CMOS transistor subnetworks. - Robert Tjärnström (EURO-DAC, 1990)

Switch-level simulation based on local decisions. - Robert Tjärnström (Integr., 1990)

Clock independent timing verification of level-sensitive latches. - Robert Tjärnström (EURO-DAC, 1991)