Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions. - Roberto Giorgio Rizzo; Sandeep Miryala; Andrea Calimera; Enrico Macii; Massimo Poncino (ACM Great Lakes Symposium on VLSI, 2015)

Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping. - Valentino Peluso; Roberto Giorgio Rizzo; Andrea Calimera; Enrico Macii; Massimo Alioto (VLSI-SoC (Selected Papers), 2016)

Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling. - Roberto Giorgio Rizzo; Andrea Calimera (NGCAS, 2017)

On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling. - Roberto Giorgio Rizzo; Valentino Peluso; Andrea Calimera; Jun Zhou 017 (VLSI-SoC (Selected Papers), 2017)

Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS. - Roberto Giorgio Rizzo; Valentino Peluso; Andrea Calimera; Jun Zhou 017; Xin Liu 015 (VLSI-SoC, 2017)

Multiplication by Inference using Classification Trees: A Case-Study Analysis. - Roberto Giorgio Rizzo; Valerio Tenace; Andrea Calimera (ISCAS, 2018)

Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling. - Roberto Giorgio Rizzo; Andrea Calimera; Jun Zhou 017 (Integr., 2018)

SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars. - Valerio Tenace; Roberto Giorgio Rizzo; Debjyoti Bhattacharjee; Anupam Chattopadhyay; Andrea Calimera (DATE, 2019)

Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets. - Valentino Peluso; Roberto Giorgio Rizzo; Antonio Cipolletta; Andrea Calimera (SNAMS, 2019)

Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools. - Roberto Giorgio Rizzo (2019)

Corrigendum to"Approximate error detection-correction for efficient adaptive voltage Over-Scaling"[Integration 63 (2018) 220-231]. - Roberto Giorgio Rizzo; Andrea Calimera; Jun Zhou 017 (Integr., 2020)

AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets. - Luca Mocerino; Roberto Giorgio Rizzo; Valentino Peluso; Andrea Calimera; Enrico Macii (VLSI-SoC, 2021)

On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets. - Luca Mocerino; Roberto Giorgio Rizzo; Valentino Peluso; Andrea Calimera; Enrico Macii (VLSI-SoC (Selected Papers), 2021)

Adaptive Test-Time Augmentation for Low-Power CPU. - Luca Mocerino; Roberto Giorgio Rizzo; Valentino Peluso; Andrea Calimera; Enrico Macii (CoRR, 2021)

TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets. - Roberto Giorgio Rizzo; Valentino Peluso; Andrea Calimera (IEEE Trans. Circuits Syst. II Express Briefs, 2021)