Expression-tree-based algorithms for code compression on embedded RISC architectures. - Guido Araujo; Paulo Centoducatte; Rodolfo Azevedo; Ricardo Pannain (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. - Marcio Buss; Rodolfo Azevedo; Paulo Centoducatte; Guido Araujo (CASES, 2001)

Uma arquitetura para execução de codigo comprimido em sistemas dedicados. - Rodolfo Jardim de Azevedo (2002)

Mixed static/dynamic profiling for dictionary based code compression. - Eduardo Braulio Wanderley Netto; Rodolfo Azevedo; Paulo Centoducatte; Guido Araujo (SoC, 2003)

Exploring Memory Hierarchy with ArchC. - Pablo Viana; Edna Barros; Sandro Rigo; Rodolfo Azevedo; Guido Araujo (SBAC-PAD, 2003)

Multi-profile based code compression. - Eduardo Braulio Wanderley Netto; Rodolfo Azevedo; Paulo Centoducatte; Guido Araujo (DAC, 2004)

Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology. - Pablo Viana; Edna Barros; Sandro Rigo; Rodolfo Azevedo; Guido Araujo (DATE, 2004)

Fast instruction set custornization. - Edson Borin; Felipe Klein; Nahri Moreano; Rodolfo Azevedo; Guido Araujo (ESTIMedia, 2004)

Optimizations for Compiled Simulation Using Instruction Type Information. - Marcus Bartholomeu; Rodolfo Azevedo; Sandro Rigo; Guido Araujo (SBAC-PAD, 2004)

Multi-Profile Instruction Based Compression. - Eduardo Braulio Wanderley Netto; Rodolfo Azevedo; Paulo Centoducatte; Guido Araujo (SBAC-PAD, 2004)

ArchC: A SystemC-Based Architecture Description Language. - Sandro Rigo; Guido Araujo; Marcus Bartholomeu; Rodolfo Azevedo (SBAC-PAD, 2004)

Teaching computer architecture using an architecture description language. - Sandro Rigo; Marcio Juliato; Rodolfo Azevedo; Guido Araujo; Paulo Centoducatte (WCAE, 2004)

Processor Centric Specification and Modelling of MPSoCs. - Cristiano C. de Araújo; Edna Barros; Rodolfo Azevedo; Guido Araujo (FDL, 2005)

High-Level Switching Activity Prediction Through Sampled Monitored Simulation. - Felipe Klein; Rodolfo Azevedo; Guido Araujo (SoC, 2005)

Exploiting the Area X Performance Trade-off with Code Compression. - Eduardo Braulio Wanderley Netto; Eduardo Afonso Billo; Rodolfo Azevedo (SoC, 2005)

Design of a decompressor engine on a SPARC processor. - Eduardo Afonso Billo; Rodolfo Azevedo; Guido Araujo; Paulo Centoducatte; Eduardo Braulio Wanderley Netto (SBCCI, 2005)

A SystemC-only design methodology and the CINE-IP multimedia platform. - Guido Araujo; Edna Barros; Elmar U. K. Melcher; Rodolfo Azevedo; Karina R. G. da Silva; Bruno O. Prado; Manoel Eusébio de Lima (Des. Autom. Embed. Syst., 2005)

Platform designer: An approach for modeling multiprocessor platforms based on SystemC. - Cristiano C. de Araújo; Millena Gomes; Edna Barros; Sandro Rigo; Rodolfo Azevedo; Guido Araujo (Des. Autom. Embed. Syst., 2005)

The ArchC Architecture Description Language and Tools. - Rodolfo Azevedo; Sandro Rigo; Marcus Bartholomeu; Guido Araujo; Cristiano C. de Araújo; Edna Barros (Int. J. Parallel Program., 2005)

2D-VLIW: An Architecture Based on the Geometry of Computation. - Ricardo Santos 002; Rodolfo Azevedo; Guido Araujo (ASAP, 2006)

Exploiting dynamic reconfiguration techniques: the 2D-VLIW approach. - Ricardo Santos 002; Rodolfo Azevedo; Guido Araujo (IPDPS, 2006)

A multi-model power estimation engine for accuracy optimization. - Felipe Klein; Guido Araujo; Rodolfo Azevedo; Roberto Leao; Luiz C. V. dos Santos (ISLPED, 2007)

On the Limitations of Power Macromodeling Techniques. - Felipe Klein; Guido Araujo; Rodolfo Azevedo; Roberto Leao; Luiz C. V. dos Santos (ISVLSI, 2007)

A Methodology and Toolset to Enable SystemC and VHDL Co-simulation. - Richard Maciel; Bruno C. Albertini; Sandro Rigo; Guido Araujo; Rodolfo Azevedo (ISVLSI, 2007)

A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation. - Fernando Kronbauer; Alexandro Baldassin; Bruno C. Albertini; Paulo Centoducatte; Sandro Rigo; Guido Araujo; Rodolfo Azevedo (IEEE International Workshop on Rapid System Prototyping, 2007)

A Software Transactional Memory System for an Asymmetric Processor Architecture. - Felipe Goldstein; Alexandro Baldassin; Paulo Centoducatte; Rodolfo Azevedo; Leonardo A. G. Garcia (SBAC-PAD, 2008)

Instruction Scheduling Based on Subgraph Isomorphism for a High Performance Computer Processor. - Ricardo Santos 002; Rodolfo Azevedo; Guido Araujo (J. Univers. Comput. Sci., 2008)

SPARC16: A New Compression Approach for the SPARC Architecture. - Leonardo Luiz Ecco; Bruno Cardoso Lopes; Eduardo Candido Xavier; Ricardo Pannain; Paulo Centoducatte; Rodolfo Jardim de Azevedo (SBAC-PAD, 2009)

On the energy-efficiency of software transactional memory. - Felipe Klein; Alexandro Baldassin; Guido Araujo; Paulo Centoducatte; Rodolfo Azevedo (SBCCI, 2009)

Characterizing the Energy Consumption of Software Transactional Memory. - Alexandro Baldassin; Felipe Klein; Guido Araujo; Rodolfo Azevedo; Paulo Centoducatte (IEEE Comput. Archit. Lett., 2009)

A pattern based instruction encoding technique for high performance architectures. - Ricardo Santos 002; Rafael Batistella; Rodolfo Azevedo (Int. J. High Perform. Syst. Archit., 2009)

A Multi-Model Engine for High-Level Power Estimation Accuracy Optimization. - Felipe Klein; Roberto Leao; Guido Araujo; Luiz C. V. dos Santos; Rodolfo Azevedo (IEEE Trans. Very Large Scale Integr. Syst., 2009)

STM versus lock-based systems: an energy consumption perspective. - Felipe Klein; Alexandro Baldassin; João Moreira; Paulo Centoducatte; Sandro Rigo; Rodolfo Azevedo (ISLPED, 2010)

Empirical Web server power modeling and characterization. - Leonardo Piga; Reinaldo A. Bergamaschi; Felipe Klein; Rodolfo Azevedo; Sandro Rigo (IISWC, 2011)

Using multiple abstraction levels to speedup an MPSoC virtual platform simulator. - João Moreira; Felipe Klein; Alexandro Baldassin; Paulo Centoducatte; Rodolfo Azevedo; Sandro Rigo (International Symposium on Rapid System Prototyping, 2011)

Ferramenta de apoio para o aprendizado ativo usando dispositivos com caneta eletrônica. - Ricardo Edgard Caceffo; Heloisa Vieira da Rocha; Rodolfo Jardim de Azevedo (Revista Brasileira de Informática na Educ., 2011)

An ArchC approach for automatic energy consumption characterization of processors. - Marcelo Guedes; Rafael Auler; Edson Borin; Rodolfo Azevedo (RSP, 2012)

Energy-Performance Tradeoffs in Software Transactional Memory. - Alexandro Baldassin; Joao P. L. de Carvalho; Leonardo A. G. Garcia; Rodolfo Azevedo (SBAC-PAD, 2012)

Optimizing Simulation in Multiprocessor Platforms Using Dynamic-Compiled Simulation. - Maxiwell Garcia; Rodolfo Azevedo; Sandro Rigo (WSCAD-SSC, 2012)

A transactional runtime system for the Cell/BE architecture. - Alexandro Baldassin; Felipe Goldstein; Rodolfo Azevedo (J. Parallel Distributed Comput., 2012)

Data center power and performance optimization through global selection of P-states and utilization rates. - Reinaldo A. Bergamaschi; Leonardo Piga; Sandro Rigo; Rodolfo Azevedo; Guido Araújo (Sustain. Comput. Informatics Syst., 2012)

Zombie memory: extending memory lifetime by reviving dead blocks. - Rodolfo Azevedo; John D. Davis; Karin Strauss; Parikshit Gopalan; Mark S. Manasse; Sergey Yekhanin (ISCA, 2013)

An automatic energy consumption characterization of processors using ArchC. - Marcelo Guedes; Rafael Auler; Liana Dessandre Duenha; Edson Borin; Rodolfo Azevedo (J. Syst. Archit., 2013)

Wear-out analysis of Error Correction Techniques in Phase-Change Memory. - Caio Hoffman; Luiz Ramos; Rodolfo Azevedo; Guido Araujo (DATE, 2014)

MPSoCBench: A toolset for MPSoC system level evaluation. - Liana Dessandre Duenha; Marcelo Guedes; Henrique Almeida; Matheus Boy; Rodolfo Azevedo (ICSAMOS, 2014)

Cloud-based OpenMP Parallelization Using a MapReduce Runtime. - Rodolfo Wottrich; Rodolfo Azevedo; Guido Araujo (SBAC-PAD, 2014)

MultiExplorer: A tool set for multicore system-on-chip design exploration. - Rodrigo Devigo; Liana Dessandre Duenha; Rodolfo Azevedo; Ricardo Santos 002 (ASAP, 2015)

SHRINK: reducing the ISA complexity via instruction recycling. - Bruno Cardoso Lopes; Rafael Auler; Luiz Ramos; Edson Borin; Rodolfo Azevedo (ISCA, 2015)

Temporal frequent value locality. - Lois Orosa 001; Rodolfo Azevedo (ASAP, 2016)

Architecting a computer with a full optical RAM. - Jorge González; Lois Orosa 001; Rodolfo Azevedo (ICECS, 2016)

Scalability evaluation in many-core systems due to the memory organization. - Guilherme A. Madalozzo; Liana Dessandre Duenha; Rodolfo Azevedo; Fernando Gehm Moraes (ICECS, 2016)

On the Dark Silicon Automatic Evaluation on Multicore Processors. - Tony Santos; Ana Silva; Liana Dessandre Duenha; Ricardo Santos 002; Edward D. Moreno; Rodolfo Azevedo (SBAC-PAD, 2016)

Developing a Computer Science Concept Inventory for Introductory Programming. - Ricardo Caceffo; Steven A. Wolfman; Kellogg S. Booth; Rodolfo Azevedo (SIGCSE, 2016)

MPSoCBench: A benchmark for high-level evaluation of multiprocessor system-on-chip tools and methodologies. - Liana Dessandre Duenha; Guilherme A. Madalozzo; Thiago Santiago; Fernando Moraes 001; Rodolfo Azevedo (J. Parallel Distributed Comput., 2016)

Design and evaluation of compact ISA extensions. - Bruno Cardoso Lopes; Leonardo Luiz Ecco; E. C. Xavier; Rodolfo Jardim de Azevedo (Microprocess. Microsystems, 2016)

A socially inspired energy feedback technology: challenges in a developing scenario. - Lara S. G. Piccolo; Cecília Baranauskas; Rodolfo Azevedo (AI Soc., 2017)

Exploiting performance, dynamic power and energy scaling in full-system simulators. - Liana Dessandre Duenha; Guilherme A. Madalozzo; Fernando Gehm Moraes; Rodolfo Azevedo (Concurr. Comput. Pract. Exp., 2017)

HybridVerifier: A Cross-Platform Verification Framework for Instruction Set Simulators. - Maxiwell Garcia; Emilio Francesquini; Rodolfo Azevedo; Sandro Rigo (IEEE Embed. Syst. Lett., 2017)

Optically connected and reconfigurable GPU architecture for optimized peer-to-peer access. - Erik F. Anderson; Jorge González; Alexander Gazman; Rodolfo Azevedo; Keren Bergman (MEMSYS, 2018)

ADeLe: Rapid Architectural Simulation for Approximate Hardware. - Isaías B. Felzmann; Matheus Martins Susin; Liana Dessandre Duenha; Rodolfo Azevedo; Lucas Francisco Wanner (SBAC-PAD, 2018)

Exploring Active Learning Approaches to Computer Science Classes. - Ricardo Caceffo; Guilherme Gama; Rodolfo Azevedo (SIGCSE, 2018)

Impact of Memory Approximation on Energy Efficiency. - Isaías B. Felzmann; João Fabrício Filho; Rodolfo Azevedo; Lucas Francisco Wanner (WSCAD, 2018)

A Methodology for Optimization of Interpreters. - Vanderson Martins do Rosário; Mario Mikio Hato; Rodolfo Azevedo; Edson Borin (WSCAD, 2018)

Phase Detection and Analysis among Multiple Program Inputs. - Rafael Soares; Luis Antonioli; Emilio Francesquini; Rodolfo Azevedo (WSCAD, 2018)

Dark-Silicon Aware Design Space Exploration. - Ricardo Santos 002; Liana Dessandre Duenha; Ana Silva; Matheus Sousa; Luiz Augusto Tedesco; João Carlos Melgarejo; Tony Santos; Rodolfo Azevedo; Edward D. Moreno (J. Parallel Distributed Comput., 2018)

Identifying and Validating Java Misconceptions Toward a CS1 Concept Inventory. - Ricardo Caceffo; Pablo Frank-Bolton; Renan Souza; Rodolfo Azevedo (ITiCSE, 2019)

Towards a Transprecision Polymorphic Floating-Point Unit for Mixed-Precision Computing. - Alisson Carvalho; Rodolfo Azevedo (SBAC-PAD, 2019)

A Resilient Interface for Approximate Data Access. - João Fabrício Filho; Isaías B. Felzmann; Rodolfo Jardim de Azevedo; Lucas Francisco Wanner (SBESC, 2019)

Dataplant: In-DRAM Security Mechanisms for Low-Cost Devices. - Lois Orosa 001; Yaohua Wang; Ivan Puddu; Mohammad Sadrosadati; Kaveh Razavi; Juan Gómez-Luna; Hasan Hassan; Nika Mansouri-Ghiasi; Arash Tavakkol; Minesh Patel; Jeremie S. Kim; Vivek Seshadri; et al. (CoRR, 2019)

A Novel Processor Architecture With a Hardware Microkernel to Improve the Performance of Task-Based Systems. - Leandro Poloni Dantas; Rodolfo Jardim de Azevedo; Salvador Pinillos Gimenez (IEEE Embed. Syst. Lett., 2019)

AVPP: Address-first Value-next Predictor with Value Prefetching for Improving the Efficiency of Load Value Prediction. - Lois Orosa 001; Rodolfo Azevedo; Onur Mutlu (ACM Trans. Archit. Code Optim., 2019)

Optically Connected Memory for Disaggregated Data Centers. - Jorge González; Alexander Gazman; Maarten Hattink; Mauricio G. Palma; Meisam Bahadori; Ruth Rubio-Noriega; Lois Orosa 001; Madeleine Glick; Onur Mutlu; Keren Bergman; Rodolfo Azevedo (SBAC-PAD, 2020)

A SystemC profiling framework to improve fixed-point hardware utilization. - Alisson Linhares; Henrique Rusa; Daniel Formiga; Rodolfo Azevedo (SBCCI, 2020)

Bringing Energy Information to the Instruction Set. - Bruno Bonotto; Lucas Francisco Wanner; Ricardo Pannain; Rodolfo Azevedo (SBESC, 2020)

ADeLe: A description language for approximate hardware. - Isaías B. Felzmann; Matheus Martins Susin; Liana Dessandre Duenha; Rodolfo Azevedo; Lucas Francisco Wanner (Future Gener. Comput. Syst., 2020)

AxRAM: A lightweight implicit interface for approximate data access. - João Fabrício Filho; Isaías B. Felzmann; Rodolfo Azevedo; Lucas Francisco Wanner (Future Gener. Comput. Syst., 2020)

Application-Oriented Retinal Image Models for Computer Vision. - Ewerton Silva; Ricardo da Silva Torres; Allan da Silva Pinto; Lin Tzy Li; José Eduardo S. Vianna; Rodolfo Azevedo; Siome Goldenstein (Sensors, 2020)

A Computational Thinking Course for Pre-Service Teachers. - Eduardo C. Oliveira; Ronaldo C. M. Correia; Rodolfo Azevedo; Simone Telles; Alessandra A. Macedo; Roberto A. Bittencourt (EDUCON, 2022)

How much C can students learn in one week? Experiences teaching C in advanced CS courses. - Rafael Corsi Ferrão; Igor dos Santos Montagner; Ricardo Caceffo; Rodolfo Azevedo (FIE, 2022)

Prof5: A RISC-V profiler tool. - Jonathas Silveira; Lucas Castro; Victor Araújo; Rodrigo Zeli; Daniel Lazari; Marcelo Guedes; Rodolfo Azevedo; Lucas Wanner 001 (SBAC-PAD, 2022)

Optically connected memory for disaggregated data centers. - Jorge González; Mauricio G. Palma; Maarten Hattink; Ruth Rubio-Noriega; Lois Orosa 001; Onur Mutlu; Keren Bergman; Rodolfo Azevedo (J. Parallel Distributed Comput., 2022)

Using Logging-on-Write to Improve Non-Volatile Memory Checkpoints via Processing-in-Memory. - Kleber Kruger; Ricardo Pannain; Rodolfo Azevedo (SBAC-PAD, 2023)

DONUTS: An efficient method for checkpointing in non-volatile memories. - Kleber Kruger; Ricardo Pannain; Rodolfo Azevedo (Concurr. Comput. Pract. Exp., 2023)

A Syllabi Analysis of CS1 Courses from Brazilian Public Universities. - Eryck Pedro da Silva; Ricardo Caceffo; Rodolfo Azevedo (Revista Brasileira de Informática na Educ., 2023)

When Test Cases Are Not Enough: Identification, Assessment, and Rationale of Misconceptions in Correct Code (MC³). - Eryck Pedro da Silva; Ricardo Caceffo; Rodolfo Azevedo (Revista Brasileira de Informática na Educ., 2023)

Usabilidade dos Ambientes Virtuais de Aprendizagem Canvas e Blackboard: Caso de estudo em uma Universidade Brasileira. - Lucas Exposto Soares; José Maria Clementino Júnior; Lucas Augusto Vieira Brito; Rogério Gil Gonzaga; Humberto Antonio Antico; Rodolfo Jardim de Azevedo; Alessandra Alaniz Macedo (Revista Brasileira de Informática na Educ., 2023)

Perceptual Learning Modules (PLM) in CS1: a Negative Result and a Methodological Warning. - Ricardo Caceffo; Jacques Wainer; Guilherme Gama; Islene C. Garcia; Rodolfo Azevedo (J. Univers. Comput. Sci., 2023)

Learn by Example in a Modern Embedded System Course. - Rafael Corsi Ferrão; Igor dos Santos Montagner; Rodolfo Azevedo (ITiCSE (2), 2024)

Embedded-check a Code Quality Tool for Automatic Firmware Verification. - Rafael Corsi Ferrão; Igor dos Santos Montagner; Mariana Silva; Craig B. Zilles; Rodolfo Azevedo (ITiCSE (1), 2024)

Micro-Specialization as a Solution to Open-Ended Project. - Rafael Corsi Ferrão; Igor dos Santos Montagner; Mariana Silva; Craig B. Zilles; Rodolfo Azevedo (SIGCSE Virtual (2), 2024)

Inter-Node Message Passing Through Optical Reconfigurable Memory Channel. - Mauricio G. Palma; Jorge González; Martin Carrasco; Ruth Rubio-Noriega; Keren Bergman; Rodolfo Azevedo (IEEE Access, 2024)

Exploring Dynamic Duty Cycling for Energy Efficiency in Coherent DSP ASIC. - Lucas Castro; Jonathas Silveira; Rodrigo Zeli; Victor Araújo; Marcelo Guedes; Daniel Lazari; Rodolfo Azevedo; Lucas Wanner 001 (IEEE Embed. Syst. Lett., 2024)

Who Introduces and Who Fixes? Analyzing Code Quality in Collaborative Student's Projects. - Rafael Corsi Ferrão; Igor dos Santos Montagner; Rodolfo Azevedo (CoRR, 2025)