A New Sufficient Feasibility Test for Asynchronous Real-Time Periodic Task Sets. - Rodolfo Pellizzoni; Giuseppe Lipari (ECRTS, 2004)

Improved Schedulability Analysis of Real-Time Transactions with Earliest Deadline Scheduling. - Rodolfo Pellizzoni; Giuseppe Lipari (IEEE Real-Time and Embedded Technology and Applications Symposium, 2005)

Feasibility Analysis of Real-Time Periodic Tasks with Offsets. - Rodolfo Pellizzoni; Giuseppe Lipari (Real Time Syst., 2005)

Adaptive Allocation of Software and Hardware Real-Time Tasks for FPGA-based Embedded Systems. - Rodolfo Pellizzoni; Marco Caccamo (IEEE Real Time Technology and Applications Symposium, 2006)

Soft Real-Time Chains for Multi-Hop Wireless Ad-Hoc Networks. - Bach Duy Bui; Rodolfo Pellizzoni; Marco Caccamo; Chin F. Cheah; Andrew Tzakis (IEEE Real-Time and Embedded Technology and Applications Symposium, 2007)

Toward the Predictable Integration of Real-Time COTS Based Systems. - Rodolfo Pellizzoni; Marco Caccamo (RTSS, 2007)

Holistic analysis of asynchronous real-time transactions with earliest deadline scheduling. - Rodolfo Pellizzoni; Giuseppe Lipari (J. Comput. Syst. Sci., 2007)

Real-Time Management of Hardware and Software Tasks for FPGA-based Embedded Systems. - Rodolfo Pellizzoni; Marco Caccamo (IEEE Trans. Computers, 2007)

Hybrid Hardware-Software Architecture for Reconfigurable Real-Time Systems. - Rodolfo Pellizzoni; Marco Caccamo (IEEE Real-Time and Embedded Technology and Applications Symposium, 2008)

Coscheduling of CPU and I/O Transactions in COTS-Based Embedded Systems. - Rodolfo Pellizzoni; Bach Duy Bui; Marco Caccamo; Lui Sha (RTSS, 2008)

Hardware Runtime Monitoring for Dependable COTS-Based Real-Time Embedded Systems. - Rodolfo Pellizzoni; Patrick O'Neil Meredith; Marco Caccamo; Grigore Rosu (RTSS, 2008)

M-CASH: A real-time resource reclaiming algorithm for multiprocessor platforms. - Rodolfo Pellizzoni; Marco Caccamo (Real Time Syst., 2008)

Handling mixed-criticality in SoC-based real-time embedded systems. - Rodolfo Pellizzoni; Patrick O'Neil Meredith; Min-Young Nam; Mu Sun; Marco Caccamo; Lui Sha (EMSOFT, 2009)

ASIIST: Application Specific I/O Integration Support Tool for Real-Time Bus Architecture Designs. - Min-Young Nam; Rodolfo Pellizzoni; Lui Sha; Richard M. Bradford (ICECCS, 2009)

Real-Time Control of I/O COTS Peripherals for Embedded Systems. - Stanley Bak; Emiliano Betti; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha (RTSS, 2009)

Rapid Early-Phase Virtual Integration. - Sibin Mohan; Min-Young Nam; Rodolfo Pellizzoni; Lui Sha; Richard M. Bradford; Shana Fliginger (RTSS, 2009)

Worst-case response time analysis of resource access models in multi-core systems. - Andreas Schranzhofer; Rodolfo Pellizzoni; Jian-Jia Chen; Lothar Thiele; Marco Caccamo (DAC, 2010)

Worst case delay analysis for memory interference in multicore systems. - Rodolfo Pellizzoni; Andreas Schranzhofer; Jian-Jia Chen; Marco Caccamo; Lothar Thiele (DATE, 2010)

Real-Time Communication for Multicore Systems with Multi-domain Ring Buses. - Bach Duy Bui; Rodolfo Pellizzoni; Deepti K. Chivukula; Marco Caccamo (RTCSA, 2010)

Impact of Peripheral-Processor Interference on WCET Analysis of Real-Time Embedded Systems. - Rodolfo Pellizzoni; Marco Caccamo (IEEE Trans. Computers, 2010)

Predictable and monitored execution for COTS-based real-time embedded systems - Rodolfo Pellizzoni (2010)

A Predictable Execution Model for COTS-Based Embedded Systems. - Rodolfo Pellizzoni; Emiliano Betti; Stanley Bak; Gang Yao; John Criswell; Marco Caccamo; Russell Kegley (IEEE Real-Time and Embedded Technology and Applications Symposium, 2011)

Timing Analysis for Resource Access Interference on Adaptive Resource Arbiters. - Andreas Schranzhofer; Rodolfo Pellizzoni; Jian-Jia Chen; Lothar Thiele; Marco Caccamo (IEEE Real-Time and Embedded Technology and Applications Symposium, 2011)

A Slot-Based Real-Time Scheduling Algorithm for Concurrent Transactions in NoC. - Bach Duy Bui; Marco Caccamo; Rodolfo Pellizzoni (RTCSA (1), 2011)

Memory Access Control in Multiprocessor for Real-Time Systems with Mixed Criticality. - Heechul Yun; Gang Yao; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha (ECRTS, 2012)

Memory-Aware Scheduling of Multicore Task Sets for Real-Time Systems. - Stanley Bak; Gang Yao; Rodolfo Pellizzoni; Marco Caccamo (RTCSA, 2012)

Memory-centric scheduling for multicore hard real-time systems. - Gang Yao; Rodolfo Pellizzoni; Stanley Bak; Emiliano Betti; Marco Caccamo (Real Time Syst., 2012)

Real-Time Scheduling of Concurrent Transactions in Multidomain Ring Buses. - Bach Duy Bui; Rodolfo Pellizzoni; Marco Caccamo (IEEE Trans. Computers, 2012)

Modeling towards incremental early analyzability of networked avionics systems using virtual integration. - Min-Young Nam; Kyungtae Kang; Rodolfo Pellizzoni; Kyung-Joon Park; Jung-Eun Kim; Lui Sha (ACM Trans. Embed. Comput. Syst., 2012)

A Dynamic Scratchpad Memory Unit for Predictable Real-Time Embedded Systems. - Saud Wasly; Rodolfo Pellizzoni (ECRTS, 2013)

ORTAP: An Offset-based response time analysis for a pipelined communication resource model. - Hany Kashif; Sina Gholamian; Rodolfo Pellizzoni; Hiren D. Patel; Sebastian Fischmeister (IEEE Real-Time and Embedded Technology and Applications Symposium, 2013)

Real-time cache management framework for multi-core architectures. - Renato Mancuso 001; Roman Dudko; Emiliano Betti; Marco Cesati; Marco Caccamo; Rodolfo Pellizzoni (IEEE Real-Time and Embedded Technology and Applications Symposium, 2013)

MemGuard: Memory bandwidth reservation system for efficient performance isolation in multi-core platforms. - Heechul Yun; Gang Yao; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha (IEEE Real-Time and Embedded Technology and Applications Symposium, 2013)

Worst Case Analysis of DRAM Latency in Multi-requestor Systems. - Zheng Pei Wu; Yogen Krish; Rodolfo Pellizzoni (RTSS, 2013)

Implementation and evaluation of global and partitioned scheduling in a real-time OS. - Giovani Gracioli; Antônio Augusto Fröhlich; Rodolfo Pellizzoni; Sebastian Fischmeister (Real Time Syst., 2013)

Real-Time I/O Management System with COTS Peripherals. - Emiliano Betti; Stanley Bak; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha (IEEE Trans. Computers, 2013)

Time-predictable execution of multithreaded applications on multicore systems. - Ahmed Alhammad; Rodolfo Pellizzoni (DATE, 2014)

Generation of communication schedules for multi-mode distributed real-time applications. - Akramul Azim; Gonzalo Carvajal; Rodolfo Pellizzoni; Sebastian Fischmeister (DATE, 2014)

A Rank-Switching, Open-Row DRAM Controller for Time-Predictable Systems. - Yogen Krishnapillai; Zheng Pei Wu; Rodolfo Pellizzoni (ECRTS, 2014)

Real-Time Systems Security through Scheduler Constraints. - Sibin Mohan; Man-Ki Yoon; Rodolfo Pellizzoni; Rakesh Bobba (ECRTS, 2014)

Schedulability analysis of global memory-predictable scheduling. - Ahmed Alhammad; Rodolfo Pellizzoni (EMSOFT, 2014)

Hiding memory latency using fixed priority scheduling. - Saud Wasly; Rodolfo Pellizzoni (RTAS, 2014)

PALLOC: DRAM bank-aware memory allocator for performance isolation on multicore platforms. - Heechul Yun; Renato Mancuso 001; Zheng Pei Wu; Rodolfo Pellizzoni (RTAS, 2014)

A formal approach to the WCRT analysis of multicore systems with memory contention under phase-structured task sets. - Kai Lampka; Georgia Giannopoulou; Rodolfo Pellizzoni; Zheng Wu; Nikolay Stoimenov (Real Time Syst., 2014)

WCET(m) Estimation in Multi-core Systems Using Single Core Equivalence. - Renato Mancuso 001; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha; Heechul Yun (ECRTS, 2015)

Parallelism-Aware Memory Interference Delay Analysis for COTS Multicore Systems. - Heechul Yun; Rodolfo Pellizzoni; Prathap Kumar Valsan (ECRTS, 2015)

Generation of communication schedules using component interfaces. - Akramul Azim; Rodolfo Pellizzoni; Sebastian Fischmeister (ETFA, 2015)

Memory efficient global scheduling of real-time tasks. - Ahmed Alhammad; Saud Wasly; Rodolfo Pellizzoni (RTAS, 2015)

A framework for scheduling DRAM memory accesses for multi-core mixed-time critical systems. - Mohamed Hassan 002; Hiren D. Patel; Rodolfo Pellizzoni (RTAS, 2015)

A generalized model for preventing information leakage in hard real-time systems. - Rodolfo Pellizzoni; Neda Paryab; Man-Ki Yoon; Stanley Bak; Sibin Mohan; Rakesh Bobba (RTAS, 2015)

A Survey on Cache Management Mechanisms for Real-Time Embedded Systems. - Giovani Gracioli; Ahmed Alhammad; Renato Mancuso 001; Antônio Augusto Fröhlich; Rodolfo Pellizzoni (ACM Comput. Surv., 2015)

Trading Cores for Memory Bandwidth in Real-Time Systems. - Ahmed Alhammad; Rodolfo Pellizzoni (RTAS, 2016)

Memory Servers for Multicore Systems. - Rodolfo Pellizzoni; Heechul Yun (RTAS, 2016)

A Real-Time Scratchpad-Centric OS for Multi-Core Embedded Systems. - Rohan Tabish; Renato Mancuso 001; Saud Wasly; Ahmed Alhammad; Sujit S. Phatak; Rodolfo Pellizzoni; Marco Caccamo (RTAS, 2016)

Exploring Opportunistic Execution for Integrating Security into Legacy Hard Real-Time Systems. - Monowar Hasan; Sibin Mohan; Rakesh B. Bobba; Rodolfo Pellizzoni (RTSS, 2016)

Real-Time Computing on Multicore Processors. - Lui Sha; Marco Caccamo; Renato Mancuso 001; Jung-Eun Kim; Man-Ki Yoon; Rodolfo Pellizzoni; Heechul Yun; Russell Kegley; Dennis R. Perlman; Greg Arundale; Richard M. Bradford (Computer, 2016)

Integrating security constraints into fixed priority real-time schedulers. - Sibin Mohan; Man-Ki Yoon; Rodolfo Pellizzoni; Rakesh B. Bobba (Real Time Syst., 2016)

A composable worst case latency analysis for multi-rank DRAM devices under open row policy. - Zheng Pei Wu; Rodolfo Pellizzoni; Danlu Guo (Real Time Syst., 2016)

Global Real-Time Memory-Centric Scheduling for Multicore Systems. - Gang Yao; Rodolfo Pellizzoni; Stanley Bak; Heechul Yun; Marco Caccamo (IEEE Trans. Computers, 2016)

Schedulability Analysis for Memory Bandwidth Regulated Multicore Real-Time Systems. - Gang Yao; Heechul Yun; Zheng Pei Wu; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha (IEEE Trans. Computers, 2016)

Memory Bandwidth Management for Efficient Performance Isolation in Multi-Core Platforms. - Heechul Yun; Gang Yao; Rodolfo Pellizzoni; Marco Caccamo; Lui Sha (IEEE Trans. Computers, 2016)

Modeling the Effects of AUTOSAR Overheads on Application Timing and Schedulability. - Manish Chauhan; Rodolfo Pellizzoni; Krzysztof Czarnecki 001 (DAC, 2017)

WCET Derivation under Single Core Equivalence with Explicit Memory Budget Assignment. - Renato Mancuso 001; Rodolfo Pellizzoni; Neriman Tokcan; Marco Caccamo (ECRTS, 2017)

Contego: An Adaptive Framework for Integrating Security Tasks in Real-Time Systems. - Monowar Hasan; Sibin Mohan; Rodolfo Pellizzoni; Rakesh B. Bobba (ECRTS, 2017)

WCET-Driven Dynamic Data Scratchpad Management With Compiler-Directed Prefetching. - Muhammad Refaat Soliman; Rodolfo Pellizzoni (ECRTS, 2017)

HopliteRT: An efficient FPGA NoC for real-time applications. - Saud Wasly; Rodolfo Pellizzoni; Nachiket Kapre (FPT, 2017)

A Requests Bundling DRAM Controller for Mixed-Criticality Systems. - Danlu Guo; Rodolfo Pellizzoni (RTAS, 2017)

A Reliable and Predictable Scratchpad-centric OS for Multi-core Embedded Systems. - Rohan Tabish; Renato Mancuso 001; Saud Wasly; Sujit S. Phatak; Rodolfo Pellizzoni; Marco Caccamo (RTAS, 2017)

A Reconnaissance Attack Mechanism for Fixed-Priority Real-Time Systems. - Chien-Ying Chen; AmirEmad Ghassami; Sibin Mohan; Negar Kiyavash; Rakesh B. Bobba; Rodolfo Pellizzoni; Man-Ki Yoon (CoRR, 2017)

PMC: A Requirement-Aware DRAM Controller for Multicore Mixed Criticality Systems. - Mohamed Hassan 002; Hiren D. Patel; Rodolfo Pellizzoni (ACM Trans. Embed. Comput. Syst., 2017)

A design-space exploration for allocating security tasks in multicore real-time systems. - Monowar Hasan; Sibin Mohan; Rodolfo Pellizzoni; Rakesh B. Bobba (DATE, 2018)

Analysis of Dynamic Memory Bandwidth Regulation in Multi-core Real-Time Systems. - Ankit Agrawal 005; Renato Mancuso 001; Rodolfo Pellizzoni; Gerhard Fohler (RTSS, 2018)

ScheduLeak: A Novel Scheduler Side-Channel Attack Against Real-Time Autonomous Control Systems. - Chien-Ying Chen; Sibin Mohan; Rakesh B. Bobba; Rodolfo Pellizzoni; Negar Kiyavash (CoRR, 2018)

Bounding DRAM Interference in COTS Heterogeneous MPSoCs for Mixed Criticality Systems. - Mohamed Hassan 002; Rodolfo Pellizzoni (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

A Comparative Study of Predictable DRAM Controllers. - Danlu Guo; Mohamed Hassan 002; Rodolfo Pellizzoni; Hiren D. Patel (ACM Trans. Embed. Comput. Syst., 2018)

Designing Mixed Criticality Applications on Modern Heterogeneous MPSoC Platforms. - Giovani Gracioli; Rohan Tabish; Renato Mancuso 001; Reza Mirosanlou; Rodolfo Pellizzoni; Marco Caccamo (ECRTS, 2019)

PREM-Based Optimal Task Segmentation Under Fixed Priority Scheduling. - Muhammad Refaat Soliman; Rodolfo Pellizzoni (ECRTS, 2019)

HopliteBuf: FPGA NoCs with Provably Stall-Free FIFOs. - Tushar Garg; Saud Wasly; Rodolfo Pellizzoni; Nachiket Kapre (FPGA, 2019)

A Novel Side-Channel in Real-Time Schedulers. - Chien-Ying Chen; Sibin Mohan; Rodolfo Pellizzoni; Rakesh B. Bobba; Negar Kiyavash (RTAS, 2019)

Bundled Scheduling of Parallel Real-Time Tasks. - Saud Wasly; Rodolfo Pellizzoni (RTAS, 2019)

Segment Streaming for the Three-Phase Execution Model: Design and Implementation. - Muhammad R. Soliman; Giovani Gracioli; Rohan Tabish; Rodolfo Pellizzoni; Marco Caccamo (RTSS, 2019)

A real-time scratchpad-centric OS with predictable inter/intra-core communication for multi-core embedded systems. - Rohan Tabish; Renato Mancuso 001; Saud Wasly; Rodolfo Pellizzoni; Marco Caccamo (Real Time Syst., 2019)

Period Adaptation for Continuous Security Monitoring in Multicore Real-Time Systems. - Monowar Hasan; Sibin Mohan; Rodolfo Pellizzoni; Rakesh B. Bobba (DATE, 2020)

Analysis of Memory-Contention in Heterogeneous COTS MPSoCs. - Mohamed Hassan 002; Rodolfo Pellizzoni (ECRTS, 2020)

Learn the Switches: Evolving FPGA NoCs with Stall-Free and Backpressure Based Routers. - Gurshaant Malik; Ian Elmor Lang; Rodolfo Pellizzoni; Nachiket Kapre (FPL, 2020)

SCE-Comm: A Real-Time Inter-Core Communication Framework for Strictly Partitioned Multi-core Processors. - Rohan Tabish; Jen-Yang Wen; Rodolfo Pellizzoni; Renato Mancuso 001; Heechul Yun; Marco Caccamo; Lui Sha (MECO, 2020)

DRAMbulism: Balancing Performance and Predictability through Dynamic Pipelining. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (RTAS, 2020)

MCsim: An Extensible DRAM Memory Controller Simulator. - Reza Mirosanlou; Danlu Guo; Mohamed Hassan 002; Rodolfo Pellizzoni (IEEE Comput. Archit. Lett., 2020)

On Scheduler Side-Channels in Dynamic-Priority Real-Time Systems. - Chien-Ying Chen; Sibin Mohan; Rodolfo Pellizzoni; Rakesh B. Bobba (CoRR, 2020)

Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms. - Homa Aghilinasab; Waqar Ali; Heechul Yun; Rodolfo Pellizzoni (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

HopliteBuf: Network Calculus-Based Design of FPGA NoCs with Provably Stall-Free FIFOs. - Tushar Garg; Saud Wasly; Rodolfo Pellizzoni; Nachiket Kapre (ACM Trans. Reconfigurable Technol. Syst., 2020)

Virtual Gang Scheduling of Parallel Real-Time Tasks. - Waqar Ali; Rodolfo Pellizzoni; Heechul Yun (DATE, 2021)

Duetto: Latency Guarantees at Minimal Performance Cost. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (DATE, 2021)

DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (MEMSYS, 2021)

Worst-case latency analysis for the versal NoC network packet switch. - Ian Elmor Lang; Nachiket Kapre; Rodolfo Pellizzoni (NOCS, 2021)

A Real-Time Virtio-Based Framework for Predictable Inter-VM Communication. - Gero Schwäricke; Rohan Tabish; Rodolfo Pellizzoni; Renato Mancuso 001; Andrea Bastoni; Alexander Zuepke; Marco Caccamo (RTSS, 2021)

An Analyzable Inter-core Communication Framework for High-Performance Multicore Embedded Systems. - Rohan Tabish; Jen-Yang Wen; Rodolfo Pellizzoni; Renato Mancuso 001; Heechul Yun; Marco Caccamo; Lui Raymond Sha (J. Syst. Archit., 2021)

Optimizing parallel PREM compilation over nested loop structures. - Zhao Gu; Rodolfo Pellizzoni (DAC, 2022)

Parallelism-Aware High-Performance Cache Coherence with Tight Latency Bounds. - Reza Mirosanlou; Mohamed Hassan 002; Rodolfo Pellizzoni (ECRTS, 2022)

Beyond Just Safety: Delay-aware Security Monitoring for Real-time Control Systems. - Monowar Hasan; Sibin Mohan; Rakesh B. Bobba; Rodolfo Pellizzoni (ACM Trans. Cyber Phys. Syst., 2022)

HopliteML: Evolving Application Customized FPGA NoCs with Adaptable Routers and Regulators. - Gurshaant Malik; Ian Elmor Lang; Rodolfo Pellizzoni; Nachiket Kapre (ACM Trans. Reconfigurable Technol. Syst., 2022)

A Tight Holistic Memory Latency Bound Through Coordinated Management of Memory Resources. - Shorouk Abdelhalim; Danesh Germchi; Mohamed Hossam; Rodolfo Pellizzoni; Mohamed Hassan 002 (ECRTS, 2023)

Co-Optimizing Cache Partitioning and Multi-Core Task Scheduling: Exploit Cache Sensitivity or Not? - Binqi Sun; Debayan Roy; Tomasz Kloda; Andrea Bastoni; Rodolfo Pellizzoni; Marco Caccamo (RTSS, 2023)

X-Stream: Accelerating streaming segments on MPSoCs for real-time applications. - Rohan Tabish; Rodolfo Pellizzoni; Renato Mancuso 001; Giovani Gracioli; Reza Mirosanlou; Marco Caccamo (J. Syst. Archit., 2023)

Lazy Load Scheduling for Mixed-criticality Applications in Heterogeneous MPSoCs. - Tomasz Kloda; Giovani Gracioli; Rohan Tabish; Reza Mirosanlou; Renato Mancuso 001; Rodolfo Pellizzoni; Marco Caccamo (ACM Trans. Embed. Comput. Syst., 2023)

Exclusive Hierarchies for Predictable Sharing in Last-Level Cache. - Xinzhe Wang; Zhuanhao Wu; Rodolfo Pellizzoni; Hiren D. Patel (RTAS, 2024)

Duration-based Instruction Cache Locking. - Wafic Lawand; Rodolfo Pellizzoni (RTCSA, 2024)

DAMA: A Dual Arbitration Mechanism for Mixed-Criticality Applications. - Wafic Lawand; Rodolfo Pellizzoni (ECRTS, 2025)

Multi-Objective Memory Bandwidth Regulation and Cache Partitioning for Multicore Real-Time Systems. - Binqi Sun; Zhihang Wei; Andrea Bastoni; Debayan Roy; Mirco Theile; Tomasz Kloda; Rodolfo Pellizzoni; Marco Caccamo (ECRTS, 2025)

ParRP: Enabling Space Isolation in Caches with Shared Data. - Xinzhe Wang; Rodolfo Pellizzoni; Hiren Patel (RTAS, 2025)