An Automated Flow to Map Throughput Constrained Applications to a MPSoC. - Roel Jordans; Firew Siyoum; Sander Stuijk; Akash Kumar 001; Henk Corporaal (PPES, 2011)

Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors. - Roel Jordans; Rosilde Corvino; Lech Józwiak (DSD, 2012)

ASAM: Automatic Architecture Synthesis and Application Mapping. - Lech Józwiak; Menno Lindwer; Rosilde Corvino; Paolo Meloni; Laura Micconi; Jan Madsen; Erkan Diken; Deepak Gangadharan; Roel Jordans; Sebastiano Pomata; Paul Pop; Giuseppe Tuveri; et al. (DSD, 2012)

Exploring processor parallelism: Estimation methods and optimization strategies. - Roel Jordans; Rosilde Corvino; Lech Józwiak; Henk Corporaal (DDECS, 2013)

An Efficient Method for Energy Estimation of Application Specific Instruction-Set Processors. - Roel Jordans; Rosilde Corvino; Lech Józwiak; Henk Corporaal (DSD, 2013)

Instruction-set architecture exploration strategies for deeply clustered VLIW ASIPs. - Roel Jordans; Rosilde Corvino; Lech Józwiak; Henk Corporaal (MECO, 2013)

ASAM: Automatic architecture synthesis and application mapping. - Lech Józwiak; Menno Lindwer; Rosilde Corvino; Paolo Meloni; Laura Micconi; Jan Madsen; Erkan Diken; Deepak Gangadharan; Roel Jordans; Sebastiano Pomata; Paul Pop; Giuseppe Tuveri; et al. (Microprocess. Microsystems, 2013)

BuildMaster: Efficient ASIP architecture exploration through compilation and simulation result caching. - Roel Jordans; Erkan Diken; Lech Józwiak; Henk Corporaal (DDECS, 2014)

Construction and exploitation of VLIW asips with multiple vector-widths. - Erkan Diken; Roel Jordans; Lech Józwiak; Henk Corporaal (MECO, 2014)

Instruction-set architecture exploration of VLIW ASIPs using a genetic algorithm. - Roel Jordans; Lech Józwiak; Henk Corporaal (MECO, 2014)

Construction and exploitation of VLIW ASIPs with heterogeneous vector-widths. - Erkan Diken; Roel Jordans; Rosilde Corvino; Lech Józwiak; Henk Corporaal; Felipe Augusto Chies (Microprocess. Microsystems, 2014)

Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths. - Erkan Diken; Martin J. O'Riordan; Roel Jordans; Lech Józwiak; Henk Corporaal; David Moloney (ASAP, 2015)

High-level software-pipelining in LLVM. - Roel Jordans; Henk Corporaal (SCOPES, 2015)

Code Generation for Reconfigurable Explicit Datapath Architectures with LLVM. - Michael Adriaansen; Mark Wijtvliet; Roel Jordans; Luc Waeijen; Henk Corporaal (DSD, 2016)

Necessity of Fault Tolerance Techniques in Xilinx Kintex 7 FPGA Devices for Space Missions: A Case Study. - Louis D. van Harten; Roel Jordans; Hamid Reza Pourshaghaghi (DSD, 2017)

Loop Overhead Reduction Techniques for Coarse Grained Reconfigurable Architectures. - Kanishkan Vadivel; Mark Wijtvliet; Roel Jordans; Henk Corporaal (DSD, 2017)

Automatic instruction-set architecture synthesis for VLIW processor cores in the ASAM project. - Roel Jordans; Lech Józwiak; Henk Corporaal; Rosilde Corvino (Microprocess. Microsystems, 2017)

Extending Halide to Improve Software Development for Imaging DSPs. - Sander Vocke; Henk Corporaal; Roel Jordans; Rosilde Corvino; Rick J. M. Nas (ACM Trans. Archit. Code Optim., 2017)

A Generic Methodology to Compute Design Sensitivity to SEU in SRAM-Based FPGA. - Mahsa Mousavi; Hamid Reza Pourshaghaghi; Mohammad Tahghighi; Roel Jordans; Henk Corporaal (DSD, 2018)

A Review of Near-Memory Computing Architectures: Opportunities and Challenges. - Gagandeep Singh 002; Lorenzo Chelini; Stefano Corda; Ahsan Javed Awan; Sander Stuijk; Roel Jordans; Henk Corporaal; Albert-Jan Boonstra (DSD, 2018)

Fast and Portable Vector DSP Simulation Through Automatic Vectorization. - Jumana Mundichipparakkal; Mohamed A. Bamakhrama; Roel Jordans (SCOPES, 2018)

Determining the necessity of fault tolerance techniques in FPGA devices for space missions. - Louis D. van Harten; Mahsa Mousavi; Roel Jordans; Hamid Reza Pourshaghaghi (Microprocess. Microsystems, 2018)

Platform Independent Software Analysis for Near Memory Computing. - Stefano Corda; Gagandeep Singh 002; Ahsan Javed Awan; Roel Jordans; Henk Corporaal (DSD, 2019)

Memory and Parallelism Analysis Using a Platform-Independent Approach. - Stefano Corda; Gagandeep Singh 002; Ahsan Javed Awan; Roel Jordans; Henk Corporaal (SCOPES, 2019)

Towards Efficient Code Generation for Exposed Datapath Architectures. - Kanishkan Vadivel; Roel Jordans; Sander Stuijk; Henk Corporaal; Pekka Jääskeläinen; Heikki Kultala (SCOPES, 2019)

Near-memory computing: Past, present, and future. - Gagandeep Singh 002; Lorenzo Chelini; Stefano Corda; Ahsan Javed Awan; Sander Stuijk; Roel Jordans; Henk Corporaal; Albert-Jan Boonstra (Microprocess. Microsystems, 2019)

TDO-CIM: Transparent Detection and Offloading for Computation In-memory. - Kanishkan Vadivel; Lorenzo Chelini; Ali BanaGozar; Gagandeep Singh 002; Stefano Corda; Roel Jordans; Henk Corporaal (DATE, 2020)

PET-to-MLIR: A polyhedral front-end for MLIR. - Konrad Komisarczyk; Lorenzo Chelini; Kanishkan Vadivel; Roel Jordans; Henk Corporaal (DSD, 2020)

Near Memory Acceleration on High Resolution Radio Astronomy Imaging. - Stefano Corda; Bram Veenboer; Ahsan Javed Awan; Akash Kumar 001; Roel Jordans; Henk Corporaal (MECO, 2020)

An Electromagnetic Energy Harvester and Power Management in 28-nm FDSOI for IoT. - Shima Sedighiani; Kamlesh Singh; Jos Huisken; Roel Jordans; Pieter Harpe; José Pineda de Gyvez (MECO, 2020)

PR3: A system For radio-interferometry and radiation measurement on sounding rockets. - Mark Wijtvliet; Bjarni Pont; Christiaan Brinkerink; Hamid Reza Pourshaghaghi; Roel Jordans; Jörg Hörandel; Jochem Beurskens; Ronald Bouma; Joris Dalderup; Peter Dolron; Jeroen Gubbels; Veronica Marcela Gomez Medina; et al. (Microprocess. Microsystems, 2020)

NMPO: Near-Memory Computing Profiling and Offloading. - Stefano Corda; Madhurya Kumaraswamy; Ahsan Javed Awan; Roel Jordans; Akash Kumar 001; Henk Corporaal (DSD, 2021)

Management of Unpredictable Harvested-Energy IoT Devices. - Shima Sedighiani; Kamlesh Singh; Roel Jordans; Pieter Harpe (ICECS, 2021)

A Low Power Fully-Digital Multi-Level Voltage Monitor Operating in a Wide Voltage Range for Energy Harvesting IoT. - Shima Sedighiani; Kamlesh Singh; Roel Jordans; Pieter Harpe; José Pineda de Gyvez (ISQED, 2021)

Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures. - Kanishkan Vadivel; Barry de Bruin; Roel Jordans; Henk Corporaal; Pekka Jääskeläinen (DSD, 2022)

Reduced-Precision Acceleration of Radio-Astronomical Imaging on Reconfigurable Hardware. - Stefano Corda; Bram Veenboer; Ahsan Javed Awan; John W. Romein; Roel Jordans; Akash Kumar 001; Albert-Jan Boonstra; Henk Corporaal (IEEE Access, 2022)

A 380 fW Leakage Data Retention Flip-Flop for Short Sleep Periods. - Shima Sedighiani; Kamlesh Singh; Roel Jordans; Pieter Harpe; José Pineda de Gyvez (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

An Ultra-Low-Leakage Microcontroller With Configurable Power Management for Energy Harvesting IoT Devices. - Shima Sedighiani; Bram van Bolderik; Barry de Bruin; Kamlesh Singh; Roel Jordans; Pieter Harpe; José Pineda de Gyvez (IEEE Access, 2025)

FPGA Innovation Research in the Netherlands: Present Landscape and Future Outlook. - Nikolaos Alachiotis 001; Sjoerd van den Belt; Steven van der Vlugt; Reinier van der Walle; Mohsen Safari; Bruno Endres Forlin; Tiziano De Matteis; Zaid Al-Ars; Roel Jordans; António J. Sousa de Almeida; Federico Corradi; Christiaan Baaij; et al. (CoRR, 2025)