An explicitly declared delayed-branch mechanism for a superscalar architecture. - Roger Collins; Gordon B. Steven (Microprocess. Microprogramming, 1994)

Pentium MPP for OLTP applications. - Mark Natale; Mark Baker; Roger Collins; David Wilson; Stephen Lucci; Izidor Gertner (HICSS (1), 1995)

Exploiting instruction-level parallelism in superscalar architecture. - Roger Collins (1995)

Instruction Scheduling for a Superscalar Architecture. - Roger Collins; Gordon B. Steven (EUROMICRO, 1996)

A superscalar architecture to exploit instruction level parallelism. - Gordon B. Steven; Bruce Christianson; Roger Collins; Richard D. Potter; Fleur L. Steven (Microprocess. Microsystems, 1997)