Statistics on logic simulation. - Kenneth F. Wong; Mark A. Franklin; Roger D. Chamberlain; Brian L. Shing (DAC, 1986)

Collecting Data About Logic Simulation. - Roger D. Chamberlain; Mark A. Franklin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

Discrete-event simulation on hypercube architectures. - Roger D. Chamberlain; Mark A. Franklin (ICCAD, 1988)

Simulated annealing on a multiprocessor. - Roger D. Chamberlain; Mark N. Edelman; Mark A. Franklin; Ellen E. Witte (ICCD, 1988)

Task assignment by parallel simulated annealing. - Ellen E. Witte; Roger D. Chamberlain; Mark A. Franklin (ICCD, 1990)

Hierarchical discrete-event simulation on hypercube architectures. - Roger D. Chamberlain; Mark A. Franklin (IEEE Micro, 1990)

Analysis of Parallel Mixed-Mode Simulation Algorithms. - Roger D. Chamberlain; Mark A. Franklin (IPPS, 1991)

Parallel Simulated Annealing using Speculative Computation. - Ellen E. Witte; Roger D. Chamberlain; Mark A. Franklin (IEEE Trans. Parallel Distributed Syst., 1991)

Performance of a Globally-Clocked Parallel Simulator. - Gregory D. Peterson; Roger D. Chamberlain (ICPP (3), 1993)

Performance Effects of Synchronization in Parallel Processors. - Roger D. Chamberlain; Mark A. Franklin (SPDP, 1993)

Exploiting lookahead in synchronous parallel simulation. - Gregory D. Peterson; Roger D. Chamberlain (WSC, 1993)

Evaluating the use of pre-simulation in VLSI circuit partitioning. - Roger D. Chamberlain; Cheryl D. Henderson (PADS, 1994)

The pessimism behind optimistic simulation. - George Varghese; Roger D. Chamberlain; William E. Weihl (PADS, 1994)

Sharing networked workstations: a performance model. - Gregory D. Peterson; Roger D. Chamberlain (SPDP, 1994)

Parallel Logic Simulation of VLSI Systems. - Mary L. Bailey; Jack V. Briner Jr.; Roger D. Chamberlain (ACM Comput. Surv., 1994)

Beyond execution time: expanding the use of performance models. - Gregory D. Peterson; Roger D. Chamberlain (IEEE Parallel Distributed Technol. Syst. Appl., 1994)

Parallel Logic Simulation of VLSI Systems. - Roger D. Chamberlain (DAC, 1995)

Genetic epidemiology, parallel algorithms, and workstation networks. - Roger D. Chamberlain; Gregory D. Peterson; Mark A. Franklin; Michael A. Province (HICSS (5), 1995)

Performance of synchronous parallel discrete-event simulation. - Bradley L. Noble; Gregory D. Peterson; Roger D. Chamberlain (HICSS (2), 1995)

Stealing cycles: Can we get along? - Gregory D. Peterson; Roger D. Chamberlain (HICSS (2), 1995)

Predicting the future: resource requirements and predictive optimism. - Bradley L. Noble; Roger D. Chamberlain (PADS, 1995)

Deriving Global Virtual Time Algorithms from Conservative Simulation Protocols. - George Varghese; Roger D. Chamberlain; William E. Weihl (Inf. Process. Lett., 1995)

Optically interconnected multicomputers using inverted-graph topologies. - Roger D. Chamberlain; Robert R. Krchnavek (IEEE Micro, 1995)

Parallel application performance in a shared resource environment. - Gregory D. Peterson; Roger D. Chamberlain (Distributed Syst. Eng., 1996)

Performance Model for Speculative Simulation using Predictive Optimism. - Bradley L. Noble; Roger D. Chamberlain (HICSS, 1999)

Fair Scheduling in an Optical Interconnection Network. - Ch'ng Shi Baw; Roger D. Chamberlain; Mark A. Franklin (MASCOTS, 1999)

Analytic performance model for speculative, synchronous, discrete-event simulation. - Bradley L. Noble; Roger D. Chamberlain (PADS, 2000)

VLSI Photonic Ring Interconnect for Embedded Multicomputers: Architecture and Performance. - Roger D. Chamberlain; Mark A. Franklin; Abhijit Mahajan (PDCS, 2001)

Performance Predictions for Speculative, Synchronous, VLSI Logic Simulation. - Bradley L. Noble; J. Cris Wade; Roger D. Chamberlain (Annual Simulation Symposium, 2001)

Evaluating the Performance of Photonic Interconnection Networks. - Roger D. Chamberlain; Ch'ng Shi Baw; Mark A. Franklin; Christopher Hackmann; Praveen Krishnamurthy; Abhijit Mahajan; Michael Wrighton (Annual Simulation Symposium, 2002)

Breaking the Memory Bottleneck with an Optical Data Path. - Jason E. Fritts; Roger D. Chamberlain (Annual Simulation Symposium, 2002)

Optical Network Reconfiguration for Signal Processing Applications. - Roger D. Chamberlain; Mark A. Franklin; Praveen Krishnamurthy (ASAP, 2002)

Tradeoffs Between Quality of Results and Resource Consumption in a Recognition System. - Michael D. DeVore; Roger D. Chamberlain; George Engel; Joseph A. O'Sullivan; Mark A. Franklin (ASAP, 2002)

Gemini: An Optical Interconnection Network for Parallel Processing. - Roger D. Chamberlain; Mark A. Franklin; Ch'ng Shi Baw (IEEE Trans. Parallel Distributed Syst., 2002)

Modeling the Power Consumption of Audio Signal Processing Computations Using Customized Numerical Representations. - Roger D. Chamberlain; Eric Hemmeter; Robert Morley; Jason White (Annual Simulation Symposium, 2003)

Dynamic Reconfiguration of an Optical Interconnect. - Praveen Krishnamurthy; Mark A. Franklin; Roger D. Chamberlain (Annual Simulation Symposium, 2003)

The Mercury system: exploiting truly fast hardware for data search. - Roger D. Chamberlain; Ron K. Cytron; Mark A. Franklin; Ronald S. Indeck (SNAPI@PACT, 2003)

Biosequence Similarity Search on the Mercury System. - Praveen Krishnamurthy; Jeremy Buhler; Roger D. Chamberlain; Mark A. Franklin; Kwame Gyang; Joseph M. Lancaster (ASAP, 2004)

An Architecture for Fast Processing of Large Unstructured Data Sets. - Mark A. Franklin; Roger D. Chamberlain; Michael Henrichs; E. F. Berkley Shands; Jason White (ICCD, 2004)

Massively Parallel Data Mining Using Reconfigurable Hardware: Approximate String Matching. - Qiong Zhang; Roger D. Chamberlain; Ronald S. Indeck; Benjamin M. West; Jason White (IPDPS, 2004)

Clutter scattering function estimation and ground moving target detection from multiple STAP datacubes. - Daniel R. Fuhrmann; Lisandro A. Boggio; John Maschmeyer; Roger D. Chamberlain (ICASSP (5), 2005)

Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory. - Roger D. Chamberlain; John W. Lockwood; Saurabh Gayen; Richard Hough; Phillip H. Jones (MSE, 2005)

Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures. - Shobana Padmanabhan; Phillip H. Jones; David V. Schuehler; Scott J. Friedman; Praveen Krishnamurthy; Huakai Zhang; Roger D. Chamberlain; Ron Cytron; Jason E. Fritts; John W. Lockwood (Int. J. Parallel Program., 2005)

VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance. - Roger D. Chamberlain; Mark A. Franklin; Praveen Krishnamurthy; Abhijit Mahajan (J. VLSI Signal Process., 2005)

Scalable Softcore Vector Processor for Biosequence Applications. - Arpith C. Jacob; Brandon Harris; Jeremy Buhler; Roger D. Chamberlain; Young H. Cho (FCCM, 2006)

Accelerator design for protein sequence HMM search. - Rahul P. Maddimsetty; Jeremy Buhler; Roger D. Chamberlain; Mark A. Franklin; Brandon Harris (ICS, 2006)

Vision for liquid architecture. - Roger D. Chamberlain; Ron K. Cytron; Jason E. Fritts; John W. Lockwood (IPDPS, 2006)

Automatic application-specific microarchitecture reconfiguration. - Shobana Padmanabhan; Ron K. Cytron; Roger D. Chamberlain; John W. Lockwood (IPDPS, 2006)

Improving cluster utilization through intelligent processor sharing. - Gary Stiehr; Roger D. Chamberlain (IPDPS, 2006)

Dusty caches for reference counting garbage collection. - Scott J. Friedman; Praveen Krishnamurthy; Roger D. Chamberlain; Ron K. Cytron; Jason E. Fritts (SIGARCH Comput. Archit. News, 2006)

Empirical performance assessment using soft-core processors on reconfigurable hardware. - Richard Hough; Praveen Krishnamurthy; Roger D. Chamberlain; Ron K. Cytron; John W. Lockwood; Jason E. Fritts (Experimental Computer Science, 2007)

FPGA-accelerated seed generation in Mercury BLASTP. - Arpith C. Jacob; Joseph M. Lancaster; Jeremy Buhler; Roger D. Chamberlain (FCCM, 2007)

A Banded Smith-Waterman FPGA Accelerator for Mercury BLASTP. - Brandon Harris; Arpith C. Jacob; Joseph M. Lancaster; Jeremy Buhler; Roger D. Chamberlain (FPL, 2007)

Preliminary results in accelerating profile HMM search on FPGAs. - Arpith C. Jacob; Joseph M. Lancaster; Jeremy D. Buhler; Roger D. Chamberlain (IPDPS, 2007)

A Federated Simulation Environment for Hybrid Systems. - Saurabh Gayen; Eric J. Tyson; Mark A. Franklin; Roger D. Chamberlain (PADS, 2007)

Application development on hybrid systems. - Roger D. Chamberlain; Mark A. Franklin; Eric J. Tyson; Jeremy Buhler; Saurabh Gayen; Patrick Crowley; James H. Buckley (SC, 2007)

Biosequence Similarity Search on the Mercury System. - Praveen Krishnamurthy; Jeremy Buhler; Roger D. Chamberlain; Mark A. Franklin; Kwame Gyang; Arpith C. Jacob; Joseph M. Lancaster (J. VLSI Signal Process., 2007)

Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs. - Arpith C. Jacob; Jeremy Buhler; Roger D. Chamberlain (ASAP, 2008)

Analytic performance models for bounded queueing systems. - Praveen Krishnamurthy; Roger D. Chamberlain (IPDPS, 2008)

Understanding the performance of streaming applications deployed on hybrid systems. - Joseph M. Lancaster; Ron Cytron; Roger D. Chamberlain (IPDPS, 2008)

Visions for application development on hybrid computing systems. - Roger D. Chamberlain; Joseph M. Lancaster; Ron K. Cytron (Parallel Comput., 2008)

Mercury BLASTP: Accelerating Protein Sequence Alignment. - Arpith C. Jacob; Joseph M. Lancaster; Jeremy Buhler; Brandon Harris; Roger D. Chamberlain (ACM Trans. Reconfigurable Technol. Syst., 2008)

Reliable Real-time Clinical Monitoring Using Sensor Network Technology. - Octav Chipara; Christopher Brooks; Sangeeta Bhattacharya; Chenyang Lu 001; Roger D. Chamberlain; Gruia-Catalin Roman; Thomas C. Bailey (AMIA, 2009)

Optimal runtime reconfiguration strategies for systolic arrays. - Arpith C. Jacob; Jeremy D. Buhler; Roger D. Chamberlain (FPL, 2009)

Poster abstract: Reliable data collection from mobile users for real-time clinical monitoring. - Octav Chipara; Christopher Brooks; Sangeeta Bhattacharya; Chenyang Lu 001; Roger D. Chamberlain; Gruia-Catalin Roman; Thomas C. Bailey (IPSN, 2009)

Sorting on architecturally diverse computer systems. - Roger D. Chamberlain; Narayan Ganesan (HPRCTA@SC, 2009)

Efficient runtime performance monitoring of FPGA-based applications. - Joseph M. Lancaster; Jeremy D. Buhler; Roger D. Chamberlain (SoCC, 2009)

Acceleration of ungapped extension in Mercury BLAST. - Joseph M. Lancaster; Jeremy Buhler; Roger D. Chamberlain (Microprocess. Microsystems, 2009)

Design of throughput-optimized arrays from recurrence abstractions. - Arpith C. Jacob; Jeremy D. Buhler; Roger D. Chamberlain (ASAP, 2010)

Deadlock-avoidance for streaming applications with split-join structure: Two case studies. - Peng Li; Kunal Agrawal 001; Jeremy Buhler; Roger D. Chamberlain; Joseph M. Lancaster (ASAP, 2010)

Accelerating HMMER on GPUs by implementing hybrid data and task parallelism. - Narayan Ganesan; Roger D. Chamberlain; Jeremy Buhler; Michela Taufer (BCB, 2010)

Better Languages for More Effective Designing. - Roger D. Chamberlain; Joseph M. Lancaster (ERSA, 2010)

Rapid RNA Folding: Analysis and Acceleration of the Zuker Recurrence. - Arpith C. Jacob; Jeremy D. Buhler; Roger D. Chamberlain (FCCM, 2010)

Design space exploration of throughput-optimized arrays from recurrence abstractions (abstract only). - Arpith C. Jacob; Jeremy D. Buhler; Roger D. Chamberlain (FPGA, 2010)

Distributed Algorithms for the Placement of Network Services. - Todd Sproull; Roger D. Chamberlain (International Conference on Internet Computing, 2010)

Application-guided tool development for architecturally diverse computation. - Roger D. Chamberlain; Jeremy Buhler; Mark A. Franklin; James H. Buckley (SAC, 2010)

Deadlock avoidance for streaming computations with filtering. - Peng Li; Kunal Agrawal 001; Jeremy Buhler; Roger D. Chamberlain (SPAA, 2010)

Auto-Pipe: Streaming Applications on Architecturally Diverse Systems. - Roger D. Chamberlain; Mark A. Franklin; Eric J. Tyson; James H. Buckley; Jeremy Buhler; Greg Galloway; Saurabh Gayen; Michael J. Hall; E. F. Berkley Shands; Naveen Singla (Computer, 2010)

The active-learning transformation: a case study in software development and systems software courses. - Ross T. Sowell; Christopher Gill 001; Roger D. Chamberlain; Cindy Grimm; Kenneth J. Goldman; Mark Tranel (J. Comput. Sci. Coll., 2010)

TimeTrial: A low-impact performance profiler for streaming data applications. - Joseph M. Lancaster; E. F. Berkley Shands; Jeremy D. Buhler; Roger D. Chamberlain (ASAP, 2011)

Optimal design-space exploration of streaming applications. - Shobana Padmanabhan; Yixin Chen 001; Roger D. Chamberlain (ASAP, 2011)

Towards More Effective Spectrum Use Based on Memory Allocation Models. - John Meier; Christopher D. Gill; Roger D. Chamberlain (COMPSAC, 2011)

Crossing Boundaries in TimeTrial: Monitoring Communications across Architecturally Diverse Computing Platforms. - Joseph M. Lancaster; Joseph G. Wingbermuehle; Jonathan C. Beard; Roger D. Chamberlain (EUC, 2011)

Asking for Performance: Exploiting Developer Intuition to Guide Instrumentation with TimeTrial. - Joseph M. Lancaster; Joseph G. Wingbermuehle; Roger D. Chamberlain (HPCC, 2011)

Bloom Filter Performance on Graphics Engines. - Lin Ma 007; Roger D. Chamberlain; Jeremy D. Buhler; Mark A. Franklin (ICPP, 2011)

Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistance. - Michael J. Hall; Viktor Gruev; Roger D. Chamberlain (ISCAS, 2011)

A Performance Model for Memory Bandwidth Constrained Applications on Graphics Engines. - Lin Ma 007; Roger D. Chamberlain (ASAP, 2012)

ScalaPipe: A Streaming Application Generator. - Joseph G. Wingbermuehle; Roger D. Chamberlain; Ron K. Cytron (FCCM, 2012)

Convexity in Non-convex Optimizations of Streaming Applications. - Shobana Padmanabhan; Yixin Chen 001; Roger D. Chamberlain (ICPADS, 2012)

Performance of a resistance-to-voltage read circuit for sensing magnetic tunnel junctions. - Michael J. Hall; Viktor Gruev; Roger D. Chamberlain (MWSCAS, 2012)

Efficient deadlock avoidance for streaming computation with filtering. - Jeremy D. Buhler; Kunal Agrawal 001; Peng Li; Roger D. Chamberlain (PPoPP, 2012)

Adding data parallelism to streaming pipelines for throughput optimization. - Peng Li; Kunal Agrawal 001; Jeremy Buhler; Roger D. Chamberlain (HiPC, 2013)

Use of simple analytic performance models for streaming data applications deployed on diverse architectures. - Jonathan C. Beard; Roger D. Chamberlain (ISPASS, 2013)

Analysis of a Simple Approach to Modeling Performance for Streaming Data Applications. - Jonathan C. Beard; Roger D. Chamberlain (MASCOTS, 2013)

Assessing the appropriateness of using markov decision processes for RF spectrum management. - John Meier; Benjamin Karaus; Sreeharsha Sistla; Terry Tidwell; Roger D. Chamberlain; Christopher D. Gill (MSWiM, 2013)

Decomposition techniques for optimal design-space exploration of streaming applications. - Shobana Padmanabhan; Yixin Chen 001; Roger D. Chamberlain (PPoPP, 2013)

Compiling for power with ScalaPipe. - Joseph G. Wingbermuehle; Ron K. Cytron; Roger D. Chamberlain (J. Syst. Archit., 2013)

Performance modeling of virtualized custom logic computations. - Michael J. Hall; Roger D. Chamberlain (ASAP, 2014)

Performance modeling for highly-threaded many-core GPUs. - Lin Ma 007; Roger D. Chamberlain; Kunal Agrawal 001 (ASAP, 2014)

Use of a Levy Distribution for Modeling Best Case Execution Time Variation. - Jonathan C. Beard; Roger D. Chamberlain (EPEW, 2014)

Analysis of classic algorithms on GPUs. - Lin Ma 007; Roger D. Chamberlain; Kunal Agrawal 001 (HPCS, 2014)

Orchestrating safe streaming computations with precise control. - Peng Li; Kunal Agrawal 001; Jeremy Buhler; Roger D. Chamberlain (ICPADS, 2014)

Superoptimization of memory subsystems. - Joseph G. Wingbermuehle; Ron K. Cytron; Roger D. Chamberlain (LCTES, 2014)

Theoretical analysis of classic algorithms on highly-threaded many-core GPUs. - Lin Ma 007; Kunal Agrawal 001; Roger D. Chamberlain (PPoPP, 2014)

Optimization of Application-Specific Memories. - Joseph G. Wingbermuehle; Ron K. Cytron; Roger D. Chamberlain (IEEE Comput. Archit. Lett., 2014)

A memory access model for highly-threaded many-core architectures. - Lin Ma 007; Kunal Agrawal 001; Roger D. Chamberlain (Future Gener. Comput. Syst., 2014)

Online Automated Reliability Classification of Queueing Models for Streaming Processing Using Support Vector Machines. - Jonathan C. Beard; Cooper Epstein; Roger D. Chamberlain (Euro-Par, 2015)

Superoptimizing Memory Subsystems for Multiple Objectives. - Joseph G. Wingbermuehle; Ron K. Cytron; Roger D. Chamberlain (Euro-Par Workshops, 2015)

Superoptimized Memory Subsystems for Streaming Applications. - Joseph G. Wingbermuehle; Ron K. Cytron; Roger D. Chamberlain (FPGA, 2015)

Run Time Approximation of Non-blocking Service Rates for Streaming Systems. - Jonathan Curtis Beard; Roger Dean Chamberlain (HPCC/CSS/ICESS, 2015)

Using M/G/l queueing models with vacations to analyze virtualized logic computations. - Michael J. Hall; Roger D. Chamberlain (ICCD, 2015)

Automated Reliability Classification of Queueing Models for Streaming Computation. - Jonathan C. Beard; Cooper Epstein; Roger D. Chamberlain (ICPE, 2015)

Layered Security and Ease of Installation for Devices on the Internet of Things. - Roger D. Chamberlain; Mike Chambers; Darren Greenwalt; Brett Steinbrueck; Todd Steinbrueck (IoTDI, 2016)

Combining Admission and Modulation Decisions for Wireless Embedded Systems. - John Meier; Christopher D. Gill; Roger D. Chamberlain (ISORC, 2016)

Water in the Cloud: Remote Understanding of Water Chemistry: Poster Abstract. - Roger D. Chamberlain; Mike Chambers; Darren Greenwalt; Brett Steinbrueck; Todd Steinbrueck (IoTDI, 2017)

Assessing user preferences in programming language design. - Roger D. Chamberlain (Onward!, 2017)

RaftLib: A C++ template library for high performance stream parallel processing. - Jonathan C. Beard; Peng Li; Roger D. Chamberlain (Int. J. High Perform. Comput. Appl., 2017)

Automated Titration in a Recirculating Water System. - Roger D. Chamberlain; Chris Edmiston; Don Williams (CySWATER@CPSWeek, 2018)

Computers Interacting with the Physical World: A First-Year Course. - Roger D. Chamberlain; Ron K. Cytron; Doug Shook; Bill Siever (CyPhy/WESE, 2018)

Hierarchical control of a catoptric surface: work-in-progress. - Roger D. Chamberlain; Chandler Ahrens; Christopher D. Gill; Scott A. Mitchell (EMSOFT, 2018)

DIBS: A Data Integration Benchmark Suite. - Anthony M. Cabrera; Clayton J. Faber; Kyle Cepeda; Robert Derber; Cooper Epstein; Jason Zheng; Ron K. Cytron; Roger D. Chamberlain (ICPE Companion, 2018)

Analysis of classic algorithms on highly-threaded many-core architectures. - Lin Ma 007; Roger D. Chamberlain; Kunal Agrawal 001; Chen Tian 002; Ziang Hu (Future Gener. Comput. Syst., 2018)

Security on the Farm: Safely Communicating with Legacy Agricultural Instrumentation. - Tim Bell 002; Roger D. Chamberlain; Mike Chambers; Brian Rieck; Todd Steinbrueck (DCOSS, 2019)

Water in the Cloud: Understanding Water Chemistry via the Internet of Things. - Roger D. Chamberlain; Mike Chambers; Darren Greenwalt; Maria Scharth; Brett Steinbrueck; Todd Steinbrueck; David Thomas (DCOSS, 2019)

Multi-spectral Reuse Distance: Divining Spatial Information from Temporal Data. - Anthony M. Cabrera; Roger D. Chamberlain; Jonathan C. Beard (HPEC, 2019)

Exploring Portability and Performance of OpenCL FPGA Kernels on Intel HARPv2. - Anthony M. Cabrera; Roger D. Chamberlain (IWOCL, 2019)

Data Integration Tasks on Heterogeneous Systems Using OpenCL. - Clayton J. Faber; Anthony M. Cabrera; Orondé Booker; Gabe Maayan; Roger D. Chamberlain (IWOCL, 2019)

Including Embedded Systems in CS: Why? When? and How? - Bill Siever; Roger D. Chamberlain; Elliott Forbes; Ingrid Russell (SIGCSE, 2019)

Designing Domain Specific Computing Systems. - Anthony M. Cabrera; Roger D. Chamberlain (FCCM, 2020)

Design and Performance Evaluation of Optimizations for OpenCL FPGA Kernels. - Anthony M. Cabrera; Roger D. Chamberlain (HPEC, 2020)

OpenCL Performance on the Intel Heterogeneous Architecture Research Platform. - Steven D. Harris; Roger D. Chamberlain; Christopher D. Gill (HPEC, 2020)

Chip-to-chip Optical Data Communications using Polarization Division Multiplexing. - Darko Ivanovich; Chenfeng Zhao; Xuan Zhang 001; Roger D. Chamberlain; Amit Deliwala; Viktor Gruev (HPEC, 2020)

Demo Abstract: More Than Two Decades of IoT. - Roger D. Chamberlain; Todd Steinbrueck (IoTDI, 2020)

Architecturally truly diverse systems: A review. - Roger D. Chamberlain (Future Gener. Comput. Syst., 2020)

HLS Portability from Intel to Xilinx: A Case Study. - Zhili Xiao; Roger D. Chamberlain; Anthony M. Cabrera (HPEC, 2021)

Toward Evaluating High-Level Synthesis Portability and Performance between Intel and Xilinx FPGAs. - Anthony M. Cabrera; Aaron R. Young; Jacob Lambert 002; Zhili Xiao; Amy An; Seyong Lee; Zheming Jin; Jungwon Kim; Jeremy Buhler; Roger D. Chamberlain; Jeffrey S. Vetter (IWOCL, 2021)

Design of Mixed-mode Systems for Pulse-shape Discrimination. - Bryan Orabutt; Roger D. Chamberlain; Jonathan Elson; George Engel; Franck Delaunay; Lee G. Sobotka (MWSCAS, 2021)

Platform Agnostic Streaming Data Application Performance Models. - Clayton J. Faber; Tom Plano; Samatha Kodali; Zhili Xiao; Abhishek Dwaraki; Jeremy D. Buhler; Roger D. Chamberlain; Anthony M. Cabrera (RSDHA@SC, 2021)

Supporting Multi-messenger Astrophysics with Fast Gamma-ray Burst Localization. - Jacob Wheelock; William Kanu; Marion Sudvarg; Zhili Xiao; Jeremy D. Buhler; Roger D. Chamberlain; James H. Buckley (UrgentHPC@SC, 2021)

IoT Benefits for Livestock Farmers. - Tim Bell 002; Todd Steinbrueck; Roger D. Chamberlain; Brian Rieck (DCOSS, 2022)

Challenges Designing for FPGAs Using High-Level Synthesis. - Clayton J. Faber; Steven D. Harris; Zhili Xiao; Roger D. Chamberlain; Anthony M. Cabrera (HPEC, 2022)

Advancing Your Arduino Game: Early and Engaging Scaffolding for Advanced CS. - Roger D. Chamberlain; James Orr; Doug Shook; Bill Siever (SIGCSE (2), 2022)

Executing Data Integration Effectively and Efficiently Near the Memory. - Chenfeng Zhao; Xuan Zhang 001; Roger D. Chamberlain (IEEE Des. Test, 2022)

SuperCut: Communication-Aware Partitioning for Near-Memory Graph Processing. - Chenfeng Zhao; Roger D. Chamberlain; Xuan Zhang 001 (CF, 2023)

IP Protection in TinyML. - Jinwen Wang; Yuhao Wu; Han Liu; Bo Yuan 002; Roger D. Chamberlain; Ning Zhang 017 (DAC, 2023)

GNNHLS: Evaluating Graph Neural Network Inference via High-Level Synthesis. - Chenfeng Zhao; Zehao Dong; Yixin Chen 001; Xuan Zhang 001; Roger D. Chamberlain (ICCD, 2023)

Parameterized Workload Adaptation for Fork-Join Tasks with Dynamic Workloads and Deadlines. - Marion Sudvarg; Jeremy Buhler; Roger D. Chamberlain; Christopher D. Gill; James H. Buckley; Wenlei Chen (RTCSA, 2023)

Localization of Gamma-ray Bursts in a Balloon-Borne Telescope. - Ye Htet; Marion Sudvarg; Jeremy Buhler; Roger D. Chamberlain; James H. Buckley (SC Workshops, 2023)

The Advanced Particle-astrophysics Telescope (APT): Computation in Space. - James H. Buckley; Jeremy Buhler; Roger D. Chamberlain (CF (Companion), 2024)

HLS Taking Flight: Toward Using High-Level Synthesis Techniques in a Space-Borne Instrument. - Marion Sudvarg; Chenfeng Zhao; Ye Htet; Meagan Konst; Thomas Lang; Nick Song; Roger D. Chamberlain; Jeremy Buhler; James H. Buckley (CF, 2024)

Machine Learning Aboard the ADAPT Gamma-Ray Telescope. - Ye Htet; Marion Sudvarg; Andrew Butzel; Jeremy D. Buhler; Roger D. Chamberlain; James H. Buckley (SC Workshops, 2024)

Teaching Digital Logic and Computer Architecture Using Open Source Tools. - Bill Siever; Michael J. Hall; James D. Feher; Roger D. Chamberlain (CF (Companion), 2025)

Coordinating Instruments for Multi-Messenger Astrophysics: Invited Paper. - Daisy Wang; Ye Htet; Marion Sudvarg; Roger D. Chamberlain; Jeremy Buhler; James H. Buckley (CF (Companion), 2025)

Performance Modeling of Non-Uniform Heterogeneous Platforms. - Steven D. Harris; Roger D. Chamberlain; Christopher D. Gill (IPDPS (Workshops), 2025)

FGI: Fast GNN Inference on Multi-Core Systems. - Binglin Ji; Chenfeng Zhao; Roger D. Chamberlain (IPDPS (Workshops), 2025)

Digital Logic, Computer Architecture, and Dev Containers: Supporting Schools from Little to Large. - Bill Siever; Michael J. Hall; Jim Feher; Roger D. Chamberlain (SIGCSE (2), 2025)

Application of Network Calculus Models to Heterogeneous Streaming Applications. - Clayton J. Faber; Roger D. Chamberlain (Int. J. Netw. Comput., 2025)

HLPerf: Demystifying the Performance of HLS-based Graph Neural Networks with Dataflow Architectures. - Chenfeng Zhao; Clayton J. Faber; Roger D. Chamberlain; Xuan Zhang 001 (ACM Trans. Reconfigurable Technol. Syst., 2025)