A neural network-based error correction in the first-stage residue of pipelined analog to digital converters. - Roghayeh Rafieisangari; Nabiollah Shiri (Int. J. Circuit Theory Appl., 2024)

FPGA-Based Multiplier with a New Approximate Full Adder for Error-Resilient Applications. - Ali Ranjbar; Elham Esmaeili; Roghayeh Rafieisangari; Nabiollah Shiri (CoRR, 2025)