Enabling LOS delay test with slow scan enable. - Satyadev Ahlawat; Darshit Vaghani; Rohini Gulve; Virendra Singh (EWDTS, 2016)

ILP based don't care bits filling technique for reducing capture power. - Rohini Gulve; Virendra Singh (EWDTS, 2016)

On determination of instantaneous peak and cycle peak switching using ILP. - Rohini Gulve; Nihar Hage; Jaynarayan T. Tudu (VDAT, 2016)

PHP: Power hungry pattern generation at higher abstraction level. - Rohini Gulve; Anshu Goel; Virendra Singh (EWDTS, 2017)

Instruction-based self-test for delay faults maximizing operating temperature. - Nihar Hage; Rohini Gulve; Masahiro Fujita; Virendra Singh (IOLTS, 2017)

A low cost technique for scan chain diagnosis. - Satyadev Ahlawat; Darshit Vaghani; Rohini Gulve; Virendra Singh (ISCAS, 2017)

Multi-mode Toggle Random Access Scan to Minimize Test Application Time. - Anshu Goel; Rohini Gulve (VDAT, 2017)

On Generation of Delay Test with Capture Power Safety. - Rohini Gulve; Nihar Hage (VDAT, 2017)

On Testing of Superscalar Processors in Functional Mode for Delay Faults. - Nihar Hage; Rohini Gulve; Masahiro Fujita; Virendra Singh (VLSID, 2017)

ATPG power guards: On limiting the test power below threshold. - Rohini Gulve; Virendra Singh (DATE, 2018)