Resistive analysis of mixed carbon nanotube bundle interconnect and its comparison with copper interconnect. - Tafseer Alam; Rohit Dhiman; Rajeevan Chandel (ICWET, 2011)

Sub-Threshold Delay and Power Analysis of Complementary Metal-Oxide Semiconductor Buffer Driven Interconnect Load for Ultra Low Power Applications. - Rohit Dhiman; Rajeevan Chandel (J. Low Power Electron., 2012)

Dynamic Crosstalk Analysis in Coupled Interconnects for Ultra-Low Power Applications. - Rohit Dhiman; Rajeevan Chandel (Circuits Syst. Signal Process., 2015)

Performance Analysis of Top-Contact MLGNR Based Interconnects. - Ramesh Kumar; Rohit Dhiman; Rajeevan Chandel (iNIS, 2016)

A 60 dB Bulk-Driven Rail-to-Rail Input/Output OTA. - Abhishek Shrivastava; Ajay Pratap Gangwar; Rahul Kumar; Rohit Dhiman (iNIS, 2016)

Delay and Frequency Investigations in Coupled MLGNR Interconnects. - Manish Joshi; Koduri Teja; Ashish Singh; Rohit Dhiman (VDAT, 2017)

Design and Performance Analysis of SiGe Hetero Nanotube Junctionless FET. - Anchal Thakur; Rohit Dhiman (TENCON, 2019)

Brain-Computer Interfacing: Design of Virtual Keyboard. - Palak Sood; Rohit Dhiman (ICCCNT, 2021)

Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects. - Ashish Singh; Rajeevan Chandel; Rohit Dhiman (Integr., 2021)

Differential Multi-bit Through Glass Vias for Three-Dimensional Integrated Circuits. - Ajay Kumar; Rohit Dhiman (VDAT, 2022)

Proposal and analysis of carbon nanotube based differential multibit through glass vias. - Ajay Kumar; Rajeevan Chandel; Rohit Dhiman (Microelectron. J., 2022)

A physics-based drain current model for Si1-xGex source/drain NT JLFET for enhanced hot carrier reliability with temperature measurement. - Anchal Thakur; Rohit Dhiman (Microelectron. J., 2022)

Frequency response and transient analysis of through glass packaging vias using matrix-rational approximation (MRA) technique for three-dimensional ICs. - Ajay Kumar; Rohit Dhiman (Microelectron. J., 2023)

Three-phased multi-scale residual-dense modified-U-Net architecture for deep image steganography. - Suyash Sachdeva; Ujjwal Sharma 005; Priyanshu Rajput; Riya Singhal; K. Madhu Kiran; Rohit Dhiman (Comput. Electr. Eng., 2025)