Scaleable check node centric architecture for LDPC decoder. - Rohit Singhal; Gwan S. Choi; Nathan Mickler; Prabhavati Koteeswaran (ISCAS (4), 2004)

Quantized LDPC decoder design for binary symmetric channels. - Rohit Singhal; Gwan S. Choi; Rabi N. Mahapatra (ISCAS (6), 2005)

Information theoretic approach to address delay and reliability in long on-chip interconnects. - Rohit Singhal; Gwan S. Choi; Rabi N. Mahapatra (ICCAD, 2006)

Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk. - Rohit Singhal; Gwan S. Choi; Rabi N. Mahapatra (ISQED, 2006)

Programmable LDPC Decoder Based on the Bubble-Sort Algorithm. - Rohit Singhal; Gwan S. Choi; Rabi N. Mahapatra (VLSI Design, 2006)

Data integrity for on-chip interconnects. - Rohit Singhal (2007)

Data Handling Limits of On-Chip Interconnects. - Rohit Singhal; Gwan Choi; Rabi N. Mahapatra (IEEE Trans. Very Large Scale Integr. Syst., 2008)

A Personalized Online Homework System in a Freshman Engineering Linear Algebra Course. - Keegan Kang; Wong Wei Pin; Xiaogang Liu; Sergey Kushnarev; Da Yang Tan; Omar Ortiz; Shubham Goyal; Rohit Singhal (TALE, 2021)