Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture. - Roman Gauchi; Maha Kooli; Pascal Vivet; Jean-Philippe Noël; Edith Beigné; Subhasish Mitra; Henri-Pierre Charles (VLSI-SoC, 2019)

Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. - Jean-Philippe Noël; Valentin Egloff; Maha Kooli; Roman Gauchi; Jean-Michel Portal; Henri-Pierre Charles; Pascal Vivet; Bastien Giraud (DATE, 2020)

Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization. - Roman Gauchi; Valentin Egloff; Maha Kooli; Jean-Philippe Noël; Bastien Giraud; Pascal Vivet; Subhasish Mitra; Henri-Pierre Charles (ISLPED, 2020)

Storage Class Memory with Computing Row Buffer: A Design Space Exploration. - Valentin Egloff; Jean-Philippe Noel; Maha Kooli; Bastien Giraud; Lorenzo Ciampolini; Roman Gauchi; César Fuguet Tortolero; Eric Guthmuller; Mathieu Moreau; Jean-Michel Portal (DATE, 2021)

An Open-source Three-Independent-Gate FET Standard Cell Library for Mixed Logic Synthesis. - Roman Gauchi; Ashton Snelgrove; Pierre-Emmanuel Gaillardon (ISCAS, 2022)

An Energy-Efficient Three-Independent-Gate FET Cell Library for Low-Power Edge Computing. - Michael Keyser; Roman Gauchi; Pierre-Emmanuel Gaillardon (VLSI-SoC, 2022)

Towards a Truly Integrated Vector Processing Unit for Memory-bound Applications Based on a Cost-competitive Computational SRAM Design Solution. - Maha Kooli; Antoine Heraud; Henri-Pierre Charles; Bastien Giraud; Roman Gauchi; Mona Ezzadeen; Kevin Mambu; Valentin Egloff; Jean-Philippe Noel (ACM J. Emerg. Technol. Comput. Syst., 2022)

Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking. - Aurélien Alacchi; Edouard Giacomin; Scott Temple; Roman Gauchi; Michael J. Wirthlin; Pierre-Emmanuel Gaillardon (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures. - Aurélien Alacchi; Edouard Giacomin; Roman Gauchi; Szymon Kulis; Pierre-Emmanuel Gaillardon (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Secure eFPGA Configuration: A System-Level Approach. - Allen Boston; Roman Gauchi; Pierre-Emmanuel Gaillardon (ARC, 2024)