Pre-Fetching for Improved Core Interfacing. - Roman L. Lysecky; Frank Vahid; Rilesh Patel; Tony Givargis (ISSS, 1999)

A first-step towards an architecture tuning methodology for low power. - Greg Stitt; Frank Vahid; Tony Givargis; Roman L. Lysecky (CASES, 2000)

Techniques for Reducing Read Latency of Core Bus Wrappers. - Roman L. Lysecky; Frank Vahid; Tony Givargis (DATE, 2000)

Experiments with the Peripheral Virtual Component Interface. - Roman L. Lysecky; Frank Vahid; Tony Givargis (ISSS, 2000)

A fast on-chip profiler memory. - Roman L. Lysecky; Susan Cotterell; Frank Vahid (DAC, 2002)

Prefetching for improved bus wrapper performance in cores. - Roman L. Lysecky; Frank Vahid (ACM Trans. Design Autom. Electr. Syst., 2002)

A codesigned on-chip logic minimizer. - Roman L. Lysecky; Frank Vahid (CODES+ISSS, 2003)

On-chip logic minimization. - Roman L. Lysecky; Frank Vahid (DAC, 2003)

Dynamic hardware/software partitioning: a first approach. - Greg Stitt; Roman L. Lysecky; Frank Vahid (DAC, 2003)

Highly configurable platforms for embedded computing systems. - Frank Vahid; Roman L. Lysecky; Chuanjun Zhang; Greg Stitt (Microelectron. J., 2003)

Dynamic FPGA routing for just-in-time FPGA compilation. - Roman L. Lysecky; Frank Vahid; Sheldon X.-D. Tan (DAC, 2004)

A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning. - Roman L. Lysecky; Frank Vahid (DATE, 2004)

A self-tuning cache architecture for embedded systems. - Chuanjun Zhang; Frank Vahid; Roman L. Lysecky (ACM Trans. Embed. Comput. Syst., 2004)

A fast on-chip profiler memory using a pipelined binary tree. - Roman L. Lysecky; Susan Cotterell; Frank Vahid (IEEE Trans. Very Large Scale Integr. Syst., 2004)

A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning. - Roman L. Lysecky; Frank Vahid (DATE, 2005)

A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation. - Roman L. Lysecky; Frank Vahid; Sheldon X.-D. Tan (FCCM, 2005)

Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only). - Roman L. Lysecky; Kris Miller; Frank Vahid; Kees A. Vissers (FPGA, 2005)

Application-specific customization of parameterized FPGA soft-core processors. - David Sheldon; Rakesh Kumar 002; Roman L. Lysecky; Frank Vahid; Dean M. Tullsen (ICCAD, 2006)

Conjoining soft-core FPGA processors. - David Sheldon; Rakesh Kumar 002; Frank Vahid; Dean M. Tullsen; Roman L. Lysecky (ICCAD, 2006)

Warp Processors. - Roman L. Lysecky; Greg Stitt; Frank Vahid (ACM Trans. Design Autom. Electr. Syst., 2006)

Low-power warp processor for power efficient high-performance embedded systems. - Roman L. Lysecky (DATE, 2007)

Non-intrusive dynamic application profiler for detailed loop execution characterization. - Ajay Nair; Roman L. Lysecky (CASES, 2008)

Hardware/software partitioning of floating point software applications to fixed-pointed coprocessor circuits. - Lance Saldanha; Roman L. Lysecky (CODES+ISSS, 2008)

Design space exploration for application specific FPGAS in system-on-a-chip designs. - Mark Hammerquist; Roman L. Lysecky (SoCC, 2008)

Warp Processing: Dynamic Translation of Binaries to FPGA Circuits. - Frank Vahid; Greg Stitt; Roman L. Lysecky (Computer, 2008)

Scalability and Parallel Execution of Warp Processing: Dynamic Hardware/Software Partitioning. - Roman L. Lysecky (Int. J. Parallel Program., 2008)

Non-intrusive dynamic application profiling for multitasked applications. - Karthik Shankar; Roman L. Lysecky (DAC, 2009)

Float-to-fixed and fixed-to-float hardware converters for rapid hardware/software partitioning of floating point software applications to static and dynamic fixed point coprocessors. - Lance Saldanha; Roman L. Lysecky (Des. Autom. Embed. Syst., 2009)

Design and implementation of a MicroBlaze-based warp processor. - Roman L. Lysecky; Frank Vahid (ACM Trans. Embed. Comput. Syst., 2009)

Autonomous hardware/software partitioning and voltage/frequency scaling for low-power embedded systems. - Jingqing Mu; Roman L. Lysecky (ACM Trans. Design Autom. Electr. Syst., 2009)

Workload capacity considering NBTI degradation in multi-core systems. - Jin Sun 006; Roman L. Lysecky; Karthik Shankar; Avinash Karanth Kodi; Ahmed Louri; Janet Meiling Wang (ASP-DAC, 2010)

A self-evolving design methodology for power efficient multi-core systems. - Jin Sun 006; Rui Zheng; Jyothi Velamala; Yu Cao 001; Roman L. Lysecky; Karthik Shankar; Janet Meiling Wang Roveda (ICCAD, 2010)

Transaction-Level Modeling for Sensor Networks Using SystemC. - Jeff Hiner; Ashish Shenoy; Roman L. Lysecky; Susan Lysecky; Ann Gordon-Ross (SUTC/UMC, 2010)

A lightweight dynamic optimization methodology for wireless sensor networks. - Arslan Munir; Ann Gordon-Ross; Susan Lysecky; Roman L. Lysecky (WiMob, 2010)

Control Focused Soft Error Detection for Embedded Applications. - Karthik Shankar; Roman L. Lysecky (IEEE Embed. Syst. Lett., 2010)

Evaluation of Dynamic Profiling Methodologies for Optimization of Sensor Networks. - Ashish Shenoy; Jeff Hiner; Susan Lysecky; Roman L. Lysecky; Ann Gordon-Ross (IEEE Embed. Syst. Lett., 2010)

Configuration Locking and Schedulability Estimation for Reduced Reconfiguration Overheads of Reconfigurable Systems. - Rahul Kalra; Roman L. Lysecky (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Profile assisted online system-level performance and power estimation for dynamic reconfigurable embedded systems. - Jingqing Mu; Roman L. Lysecky (ASP-DAC, 2011)

Modeling of Data Adaptable Reconfigurable Embedded Systems. - Vijay Shankar Gopinath; Jonathan Sprinkle; Roman L. Lysecky (ECBS, 2011)

Hardware Observability Framework for Minimally Intrusive Online Monitoring of Embedded Systems. - Jong Chul Lee; Andrew S. Gardner; Roman Lysecky (ECBS, 2011)

Hardware/Software Communication Middleware for Data Adaptable Embedded Systems. - Sachidanand Mahadevan; Vijay Shankar Gopinath; Roman L. Lysecky; Jonathan Sprinkle; Jerzy W. Rozenblit; Michael W. Marcellin (ECBS, 2011)

Efficient hardware-based nonintrusive dynamic application profiling. - Ajay Nair; Karthik Shankar; Roman L. Lysecky (ACM Trans. Embed. Comput. Syst., 2011)

Online algorithms for wireless sensor networks dynamic optimization. - Arslan Munir; Ann Gordon-Ross; Susan Lysecky; Roman L. Lysecky (CCNC, 2012)

Adaptive online heuristic performance estimation and power optimization for reconfigurable embedded systems. - Jingqing Mu; Roman L. Lysecky (CODES+ISSS, 2012)

Automated Software Generation and Hardware Coprocessor Synthesis for Data-Adaptable Reconfigurable Systems. - Andrew Milakovich; Vijay Shankar Gopinath; Roman L. Lysecky; Jonathan Sprinkle (ECBS, 2012)

SNR analysis approach for hardware/software partitioning using dynamically adaptable fixed point representation. - Varadaraj Kamath Nileshwar; Roman Lysecky (ACM Great Lakes Symposium on VLSI, 2012)

Event-driven framework for configurable runtime system observability for SOC designs. - Jong Chul Lee; Faycel Kouteib; Roman Lysecky (ITC, 2012)

An overseer control methodology for data adaptable embedded systems. - Sean Whitsitt; Jonathan Sprinkle; Roman L. Lysecky (MPM@MoDELS, 2012)

ATLeS-SN. - Adrian Lizarraga; Lu Ding; Jeff Hiner; Roman Lysecky; Susan Lysecky; Ann Gordon-Ross (Des. Autom. Embed. Syst., 2012)

A self-tuning design methodology for power-efficient multi-core systems. - Jin Sun 006; Rui Zheng; Jyothi Velamala; Yu Cao 001; Roman L. Lysecky; Karthik Shankar; Janet Meiling Wang Roveda (ACM Trans. Design Autom. Electr. Syst., 2012)

Efficient reconfiguration methods to enable rapid deployment of runtime reconfigurable systems. - Roman Lysecky; Nathan Sandoval; Sean Whitsitt; Casey Mackin; Jonathan Sprinkle (ACSSC, 2013)

Accuracy-Guided Runtime Adaptive Profiling Optimization of Wireless Sensor Networks. - Lu Ding; Adrian Lizarraga; Susan Lysecky; Roman Lysecky; Ann Gordon-Ross (ECBS, 2013)

System Observation of Blocking, Non-blocking, and Cascading Events for Runtime Monitoring of Real-Time Systems. - Jong Chul Lee; Roman Lysecky (ECBS, 2013)

How You Can Learn to Stop Worrying and Love Reconfigurable Embedded Systems: A Tutorial. - Nathan Sandoval; Casey Mackin; Roman L. Lysecky; Jonathan Sprinkle (ECBS, 2013)

System Throughput Optimization and Runtime Communication Middleware Supporting Dynamic Software-Hardware Task Migration in Data Adaptable Embedded Systems. - Nathan Sandoval; Casey Mackin; Sean Whitsitt; Roman L. Lysecky; Jonathan Sprinkle (ECBS, 2013)

Discrete event system specification, synthesis, and optimization of low-power FPGA-based embedded systems. - Tim Pifer; David M. Schwartz; Roman Lysecky; Chungman Seo; Bernard P. Zeigler (FPT, 2013)

Runtime hardware/software task transition scheduling for data-adaptable embedded systems. - Nathan Sandoval; Casey Mackin; Sean Whitsitt; Roman L. Lysecky; Jonathan Sprinkle (FPT, 2013)

A lightweight dynamic optimization methodology and application metrics estimation model for wireless sensor networks. - Arslan Munir; Ann Gordon-Ross; Susan Lysecky; Roman Lysecky (Sustain. Comput. Informatics Syst., 2013)

Dynamic profiling and fuzzy-logic-based optimization of sensor network platforms. - Adrian Lizarraga; Roman Lysecky; Susan Lysecky; Ann Gordon-Ross (ACM Trans. Embed. Comput. Syst., 2013)

Profiling and online system-level performance and power estimation for dynamically adaptable embedded systems. - Jingqing Mu; Karthik Shankar; Roman L. Lysecky (ACM Trans. Embed. Comput. Syst., 2013)

Area-Efficient Event Stream Ordering for Runtime Observability of Embedded Systems. - Jong Chul Lee; Roman Lysecky (DAC, 2014)

Hardware-Based Event Stream Ordering for System-Level Observation Framework. - Jong Chul Lee; Jovan Vance; Roman Lysecky (IEEE Embed. Syst. Lett., 2014)

Workload assignment considering NBTI degradation in multicore systems. - Jin Sun 006; Roman L. Lysecky; Karthik Shankar; Avinash Karanth Kodi; Ahmed Louri; Janet Roveda (ACM J. Emerg. Technol. Comput. Syst., 2014)

Timing-based anomaly detection in embedded systems. - Sixing Lu; Minjun Seo; Roman Lysecky (ASP-DAC, 2015)

Analysis of Control Flow Events for Timing-based Runtime Anomaly Detection. - Sixing Lu; Roman Lysecky (WESS, 2015)

Students learn more with less text that covers the same core topics. - Alex D. Edgcomb; Frank Vahid; Roman L. Lysecky (FIE, 2015)

Application-Specific Customization of Dynamic Profiling Mechanisms for Sensor Networks. - Lu Ding; Adrian Lizarraga; Ashish Shenoy; Ann Gordon-Ross; Susan Lysecky; Roman L. Lysecky (IEEE Access, 2015)

Security challenges for medical devices. - Johannes Sametinger; Jerzy W. Rozenblit; Roman L. Lysecky; Peter Ott (Commun. ACM, 2015)

System-Level Observation Framework for Non-Intrusive Runtime Monitoring of Embedded Systems. - Jong Chul Lee; Roman L. Lysecky (ACM Trans. Design Autom. Electr. Syst., 2015)

Model-Driven Optimization of Data-Adaptable Embedded Systems. - Adrian Lizarraga; Roman L. Lysecky; Jonathan Sprinkle (COMPSAC, 2016)

Latency, Power, and Security Optimization in Distributed Reconfigurable Embedded Systems. - Hyunsuk Nam; Roman Lysecky (IPDPS Workshops, 2016)

In-Situ Requirements Monitoring of Embedded Systems. - Minjun Seo; Roman Lysecky (IEEE Embed. Syst. Lett., 2016)

Non-intrusive dynamic profiler for multicore embedded systems. - Sudarshan Sargur; Roman Lysecky (ASP-DAC, 2017)

Subcomponent Timing-Based Detection of Malware in Embedded Systems. - Sixing Lu; Roman Lysecky; Jerzy W. Rozenblit (ICCD, 2017)

Hierarchical Non-intrusive In-situ Requirements Monitoring for Embedded Systems. - Minjun Seo; Roman Lysecky (RV, 2017)

Getting Students to Earnestly Do Reading, Studying, and Homework in an Introductory Programming Class. - Alex D. Edgcomb; Frank Vahid; Roman Lysecky; Susan Lysecky (SIGCSE, 2017)

Task Transition Scheduling for Data-Adaptable Systems. - Nathan Sandoval; Casey Mackin; Sean Whitsitt; Vijay Shankar Gopinath; Sachidanand Mahadevan; Andrew Milakovich; Kyle Merry; Jonathan Sprinkle; Roman Lysecky (ACM Trans. Embed. Comput. Syst., 2017)

Runtime requirements monitoring for state-based hardware: work-in-progress. - Minjun Seo; Roman Lysecky (CODES+ISSS, 2018)

Evaluation of the Complexity of Automated Trace Alignment using Novel Power Obfuscation Methods. - Bozhi Liu; Kemeng Chen; Minjun Seo; Janet Meiling Wang; Roman Lysecky (ACM Great Lakes Symposium on VLSI, 2018)

Hardware-Based Probabilistic Threat Detection and Estimation for Embedded Systems. - Nadir Amin Carreon; Sixing Lu; Roman Lysecky (ICCD, 2018)

Composable Template Attacks Using Templates for Individual Architectural Components. - Bozhi Liu; Roman Lysecky; Janet Meiling Wang Roveda (ICCD, 2018)

Python Versus C++: An Analysis of Student Struggle on Small Coding Exercises in Introductory Programming Courses. - Nabeel Alzahrani; Frank Vahid; Alex D. Edgcomb; Kevin Nguyen; Roman Lysecky (SIGCSE, 2018)

Teaching Students a Systematic Approach to Debugging: (Abstract Only). - Roman Lysecky; Frank Vahid (SIGCSE, 2018)

Trustworthy multi-modal framework for life-critical systems security. - Aakarsh Rao; Jerzy W. Rozenblit; Roman Lysecky; Johannes Sametinger (SpringSim (ANSS), 2018)

Mixed Cryptography Constrained Optimization for Heterogeneous, Multicore, and Distributed Embedded Systems. - Hyunsuk Nam; Roman Lysecky (Comput., 2018)

Probabilistic Threat Detection for Risk Management in Cyber-physical Medical Systems. - Aakarsh Rao; Nadir Carreon; Roman Lysecky; Jerzy W. Rozenblit (IEEE Softw., 2018)

Time and Sequence Integrated Runtime Anomaly Detection for Embedded Systems. - Sixing Lu; Roman Lysecky (ACM Trans. Embed. Comput. Syst., 2018)

Non-Intrusive In-Situ Requirements Monitoring of Embedded System. - Minjun Seo; Roman Lysecky (ACM Trans. Design Autom. Electr. Syst., 2018)

Resilient Security of Medical Cyber-Physical Systems. - Aakarsh Rao; Nadir Carreón; Roman Lysecky; Jerzy W. Rozenblit; Johannes Sametinger (DEXA Workshops, 2019)

New web-based learning content for core programming concepts using Coral. - Frank Vahid; Alex D. Edgcomb; Roman Lysecky; Yamuna Rajasekhar (FIE, 2019)

Right-Provisioned IoT Edge Computing: An Overview. - Tosiron Adegbija; Roman Lysecky; Vinu Vijay Kumar (ACM Great Lakes Symposium on VLSI, 2019)

Automatic Extraction of Requirements from State-based Hardware Designs for Runtime Verification. - Minjun Seo; Roman Lysecky (ACM Great Lakes Symposium on VLSI, 2019)

String stability of commercial adaptive cruise control vehicles: WIP abstract. - George Gunter; Yanbing Wang; Derek Gloudemans; Raphael E. Stern; Daniel B. Work; Maria Laura Delle Monache; Rahul Bhadani; Matt Bunting; Roman Lysecky; Jonathan Sprinkle; Benjamin Seibold; Benedetto Piccoli (ICCPS, 2019)

Auto-Graded Programming Labs: Dos and Don'ts for Less-Stressed Higher-Performing Students, Reduced Grading Time, and Happier Teachers, . - Frank Vahid; Roman Lysecky (SIGCSE, 2019)

Window-Based Statistical Analysis Of Timing Subcomponents For Efficient Detection Of Malware In Life-Critical Systems. - Nadir Carreon; Allison Gilbreath; Roman Lysecky (SpringSim, 2019)

Improving CS/CE education: recent research and experiences. - Roman Lysecky (J. Comput. Sci. Coll., 2019)

Security-aware multi-objective optimization of distributed reconfigurable embedded systems. - Hyunsuk Nam; Roman Lysecky (J. Parallel Distributed Comput., 2019)

Data-driven Anomaly Detection with Timing Features for Embedded Systems. - Sixing Lu; Roman Lysecky (ACM Trans. Design Autom. Electr. Syst., 2019)

BackFlow: Backward Edge Control Flow Enforcement for Low End ARM Microcontrollers. - Cyril Bresch; Roman Lysecky; David Hély (DATE, 2020)

Statistical Time-based Intrusion Detection in Embedded Systems. - Nadir Amin Carreon; Allison Gilbreath; Roman Lysecky (DATE, 2020)

TrustFlow-X: A Practical Framework for Fine-grained Control-flow Integrity in Critical Systems. - Cyril Bresch; David Hély; Roman Lysecky; Stéphanie Chollet; Ioannis Parissis (ACM Trans. Embed. Comput. Syst., 2020)

Automated Model-Based Optimization of Data-Adaptable Embedded Systems. - Adrian Lizarraga; Jonathan Sprinkle; Roman Lysecky (ACM Trans. Embed. Comput. Syst., 2020)

The shift from static college textbooks to customizable content: A case study at zyBooks. - Chelsea Gordon; Roman Lysecky; Frank Vahid (FIE, 2021)

SecPump: A Connected Open-Source Infusion Pump for Security Research Purposes. - Cyril Bresch; David Hély; Stéphanie Chollet; Roman Lysecky (IEEE Embed. Syst. Lett., 2021)

Methods and Analysis of Automated Trace Alignment Under Power Obfuscation in Side Channel Attacks. - Bozhi Liu; Kemeng Chen; Minjun Seo; Janet Meiling Roveda; Roman Lysecky (J. Hardw. Syst. Secur., 2021)

Probabilistic Estimation of Threat Intrusion in Embedded Systems for Runtime Detection. - Nadir Amin Carreon; Sixing Lu; Roman Lysecky (ACM Trans. Embed. Comput. Syst., 2021)

Are Commercially Implemented Adaptive Cruise Control Systems String Stable? - George Gunter; Derek Gloudemans; Raphael E. Stern; Sean T. McQuade; Rahul Bhadani; Matt Bunting; Maria Laura Delle Monache; Roman Lysecky; Benjamin Seibold; Jonathan Sprinkle; Benedetto Piccoli; Daniel B. Work (IEEE Trans. Intell. Transp. Syst., 2021)

Inter-Architecture Portability of Artificial Neural Networks and Side Channel Attacks. - Manoj Gopale; Gregory Ditzler; Roman Lysecky; Janet Roveda (ACM Great Lakes Symposium on VLSI, 2022)

FIRE: A Finely Integrated Risk Evaluation Methodology for Life-Critical Embedded Systems. - Aakarsh Rao; Nadir Amin Carreon; Roman Lysecky; Jerzy W. Rozenblit (Inf., 2022)

A high-level synthesis approach for precisely-timed, energy-efficient embedded systems. - Yuchao Liao; Tosiron Adegbija; Roman Lysecky (Sustain. Comput. Informatics Syst., 2022)

Efficient System-Level Design Space Exploration for High-Level Synthesis Using Pareto-Optimal Subspace Pruning. - Yuchao Liao; Tosiron Adegbija; Roman Lysecky (ASP-DAC, 2023)

Less Is More: Students Skim Lengthy Online Textbooks. - Chelsea Gordon; Roman Lysecky; Frank Vahid (IEEE Trans. Educ., 2023)

Skip the Benchmark: Generating System-Level High-Level Synthesis Data using Generative Machine Learning. - Yuchao Liao; Tosiron Adegbija; Roman Lysecky; Ravi Tandon (ACM Great Lakes Symposium on VLSI, 2024)

Are LLMs Any Good for High-Level Synthesis? - Yuchao Liao; Tosiron Adegbija; Roman Lysecky (ICCAD, 2024)

System-Level Design Space Exploration for High-Level Synthesis Under End-to-End Latency Constraints. - Yuchao Liao; Tosiron Adegbija; Roman Lysecky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)