Dynamic reconfigurable mixed-signal architecture for safety critical applications. - Romuald Girardey; Michael Hübner 001; Jürgen Becker 001 (FPL, 2009)

Safety Aware Place and Route for On-Chip Redundancy in Safety Critical Applications. - Romuald Girardey; Michael Hübner 001; Jürgen Becker 001 (ISVLSI, 2010)

Mixed-Signal Diverse Redundant System for Safety Critical Applications in FPGA. - Romuald Girardey; Michael Hübner 001; Jürgen Becker 001 (ISVLSI, 2010)

A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion. - Peter Figuli; Michael Hübner 001; Romuald Girardey; Falco Bapp; Thomas Bruckschlögl; Florian Thoma; Jörg Henkel; Jürgen Becker 001 (AHS, 2011)

A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture. - Michael Hübner 001; Peter Figuli; Romuald Girardey; Dimitrios Soudris; Kostas Siozios; Jürgen Becker 001 (IPDPS Workshops, 2011)

Xilinx tools facilitate development of FPGA applications for IEC61508. - Giulio Corradi; Romuald Girardey; Jürgen Becker 001 (AHS, 2012)