Low-power SRAM design using half-swing pulse-mode techniques. - Kenneth W. Mai; Toshihiko Mori; Bharadwaj S. Amrutur; Ron Ho; Bennett Wilburn; Mark A. Horowitz; Isao Fukushi; Tetsuo Izawa; Shin Mitarai (IEEE J. Solid State Circuits, 1998)

Interconnect scaling implications for CAD. - Ron Ho; Ken Mai; Hema Kapadia; Mark Horowitz (ICCAD, 1999)

Smart Memories: a modular reconfigurable architecture. - Ken Mai; Tim Paaske; Nuwan Jayasena; Ron Ho; William J. Dally; Mark Horowitz (ISCA, 2000)

The future of wires. - Ron Ho; Kenneth Mai; Mark A. Horowitz (Proc. IEEE, 2001)

An Adaptive OpenMP Loop Scheduler for Hyperthreaded SMPs. - Yun Zhang; Mihai Burcea; Victor Cheng; Ron Ho; Michael Voss (PDCS, 2004)

Long Wires and Asynchronous Control. - Ron Ho; Jonathan Gainsley; Robert J. Drost (ASYNC, 2004)

Proximity communication. - Robert J. Drost; Robert David Hopkins 001; Ron Ho; Ivan E. Sutherland (IEEE J. Solid State Circuits, 2004)

Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication. - Robert J. Drost; Craig Forrest; Bruce Guenin; Ron Ho; Ashok V. Krishnamoorthy; Danny Cohen; John E. Cunningham; Bernard Tourancheau; Arthur Zingher; Alex Chow; Gary Lauterbach; Ivan E. Sutherland (Hot Interconnects, 2005)

High-performance ULSI: the real limiter to interconnect scaling. - Ron Ho (SLIP, 2005)

Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS. - Ken Mai; Ron Ho; Elad Alon; Dean Liu; Younggon Kim; Dinesh Patil; Mark A. Horowitz (IEEE J. Solid State Circuits, 2005)

Robust Energy-Efficient Adder Topologies. - Dinesh Patil; Omid Azizi; Mark Horowitz; Ron Ho; Rajesh Ananthraman (IEEE Symposium on Computer Arithmetic, 2007)

On-chip samplers for test and debug of asynchronous circuits. - Frankie Liu; Ron Ho; Robert J. Drost; Scott Fairbanks (ASYNC, 2007)

Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication. - David Hopkins 001; Alex Chow; Robert Bosnyak; Bill Coates 001; Jo C. Ebergen; Scott Fairbanks; Jonathan Gainsley; Ron Ho; Jon K. Lexau; Frankie Liu; Tarik Ono; Justin Schauer; et al. (ISSCC, 2007)

Research Challenges for On-Chip Interconnection Networks. - John D. Owens; William J. Dally; Ron Ho; Doddaballapur Narasimha-Murthy Jayasimha; Stephen W. Keckler; Li-Shiuan Peh (IEEE Micro, 2007)

Optical Interconnects for Present and Future High-Performance Computing Systems. - Ashok V. Krishnamoorthy; Jon K. Lexau; Xuezhe Zheng; John E. Cunningham; Ron Ho; Ola Tørudbakken (Hot Interconnects, 2008)

Transistor Variability in Nanometer-Scale Technologies (Forum). - Ron Ho (ISSCC, 2008)

High Speed and Low Energy Capacitively Driven On-Chip Wires. - Ron Ho; Tarik Ono; Robert David Hopkins 001; Alex Chow; Justin Schauer; Frankie Y. Liu; Robert J. Drost (IEEE J. Solid State Circuits, 2008)

Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference. - Donhee Ham; Hideto Hidaka; Ron Ho; Ram K. Krishnamurthy (IEEE J. Solid State Circuits, 2009)

Computer Systems Based on Silicon Photonic Interconnects. - Ashok V. Krishnamoorthy; Ron Ho; Xuezhe Zheng; Herb Schwetman; Jon K. Lexau; Pranay Koka; Guoliang Li 003; Ivan Shubin; John E. Cunningham (Proc. IEEE, 2009)

Clocking Links in Multi-chip Packages: A Case Study. - Tamer A. Ali 001; Dinesh Patil; Frankie Liu; Elad Alon; Jon K. Lexau; Chih-Kong Ken Yang; Ron Ho (Hot Interconnects, 2010)

Optical Interconnects in the Data Center. - Ron Ho; John E. Cunningham; Herb Schwetman; Xuezhe Zheng; Ashok V. Krishnamoorthy (Hot Interconnects, 2010)

Silicon-photonic network architectures for scalable, power-efficient multi-chip systems. - Pranay Koka; Michael O. McCracken; Herb Schwetman; Xuezhe Zheng; Ron Ho; Ashok V. Krishnamoorthy (ISCA, 2010)

High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS. - Jae-sun Seo; Ron Ho; Jon K. Lexau; Michael Dayringer; Dennis Sylvester; David T. Blaauw (ISSCC, 2010)

Optical Interconnect for High-End Computer Systems. - Ron Ho; Frankie Liu; Dinesh Patil; Xuezhe Zheng; Guoliang Li 003; Ivan Shubin; Elad Alon; Jon K. Lexau; Herb Schwetman; John E. Cunningham; Ashok V. Krishnamoorthy (IEEE Des. Test Comput., 2010)

Guest Editorial for Special Issue on High-Performance Multichip Interconnections. - Vladimir Stojanovic; Chih-Kong Ken Yang; Ron Ho (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS. - Philip Amberg; Frankie Liu; Michael Dayringer; Jon K. Lexau; Dinesh Patil; Jonathan Gainsley; Hesam Fathi Moghadam; Elad Alon; Xuezhe Zheng; John E. Cunningham; Ashok V. Krishnamoorthy; Ron Ho (A-SSCC, 2011)

A 4.6GHz MDLL with -46dBc reference spur and aperture position tuning. - Tamer A. Ali 001; Amr Amin Hafez; Robert J. Drost; Ronald Ho; Chih-Kong Ken Yang (ISSCC, 2011)

Energy-Efficient Error Control for Tightly Coupled Systems Using Silicon Photonic Interconnects. - Xuezhe Zheng; Pranay Koka; Michael O. McCracken; Herb Schwetman; James G. Mitchell; Jin Yao; Ron Ho; Kannan Raj; Ashok V. Krishnamoorthy (JOCN, 2011)

A micro-architectural analysis of switched photonic multi-chip interconnects. - Pranay Koka; Michael O. McCracken; Herb Schwetman; Chia-Hsin Owen Chen; Xuezhe Zheng; Ron Ho; Kannan Raj; Ashok V. Krishnamoorthy (ISCA, 2012)

A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding. - Tamer A. Ali 001; Won Ho Park; Preeti Mulage; E-Hung Chen; Ron Ho; Chih-Kong Ken Yang (VLSIC, 2012)

10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS. - Frankie Liu; Dinesh Patil; Jon K. Lexau; Philip Amberg; Michael Dayringer; Jonathan Gainsley; Hesam Fathi Moghadam; Xuezhe Zheng; John E. Cunningham; Ashok V. Krishnamoorthy; Elad Alon; Ron Ho (IEEE J. Solid State Circuits, 2012)

A 33mW 100Gbps CMOS silicon photonic WDM transmitter using off-chip laser sources. - Xuezhe Zheng; Eric Chang; Ivan Shubin; Guoliang Li 003; Ying Luo 009; Jin Yao; Hiren D. Thacker; Jin-Hyoung Lee; Jon K. Lexau; Frankie Liu; Philip Amberg; Kannan Raj; et al. (OFC/NFOEC, 2013)

Efficient techniques for canceling transceiver noise. - Eric Chang; Frankie Liu; Philip Amberg; Jon K. Lexau; Ron Ho (VLSI-DAT, 2013)

A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding. - Tamer A. Ali 001; Robert J. Drost; Ron Ho; Chih-Kong Ken Yang (IEEE J. Solid State Circuits, 2013)

High-efficiency crossbar switches using capacitively coupled signaling. - Cagla Cakir; Ron Ho; Jon K. Lexau; Ken Mai (ISLPED, 2015)

Modeling and Design of High-Radix On-Chip Crossbar Switches. - Cagla Cakir; Ron Ho; Jon K. Lexau; Ken Mai (NOCS, 2015)

Scalable High-Radix Modular Crossbar Switches. - Cagla Cakir; Ron Ho; Jon K. Lexau; Ken Mai (Hot Interconnects, 2016)

3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration. - David Greenhill; Ron Ho; David M. Lewis; Herman Schmit; Kok Hong Chan; Andy Tong; Sean Atsatt; Dana How; Peter McElheny; Keith Duwel; Jeffrey Schulz; Darren Faulkner; et al. (ISSCC, 2017)