An Empirical Study of Scalable Domain Decomposition Methods for a 2-D Parabolic Equation Solver. - Chi-Ming Chiang; Qiang Du; Matt W. Mutka; Ron Sass (PPSC, 1993)

Transformations on Doubly Nested Loops. - Ron Sass; Matt W. Mutka (IFIP PACT, 1994)

Enabling unimodular transformations. - Ron Sass; Matt W. Mutka (SC, 1994)

Statistical Characteristics and Multiplexing of MPEG Streams. - Marwan Krunz; Ron Sass; Herman D. Hughes (INFOCOM, 1995)

A Reconfigurable Extension to the Network Interface of Beowulf Clusters. - Keith D. Underwood; Ron Sass; Walter B. Ligon III (CLUSTER, 2001)

Acceleration of a 2D-FFT on an Adaptable Computing Cluster. - Keith D. Underwood; Ron R. Sass; Walter B. Ligon III (FCCM, 2001)

Cost effectiveness of an adaptable computing cluster. - Keith D. Underwood; Ron R. Sass; Walter B. Ligon III (SC, 2001)

A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. - Ranjesh G. Jaganathan; Keith D. Underwood; Ron R. Sass (FCCM, 2003)

Reconfigurable Mapping Functions for Online Architectures. - Shyamnath Harinath; Ron Sass (IPDPS, 2003)

Analysis of a prototype intelligent network interface. - Keith D. Underwood; Walter B. Ligon III; Ron Sass (Concurr. Comput. Pract. Exp., 2003)

FERP Interface and Interconnect Cores for Stream Processing Applications. - Jeff Young; Ron Sass (EUC, 2004)

Automatic discovery, selection, and specialization of modules in RCADE. - Ranjesh G. Jaganathan; Matthew Simpson; Ron Sass (FPGA, 2004)

Online placement infrastructure to support run-time reconfiguration. - Brian Leonard; Jeff Young; Ron Sass (FPGA, 2004)

Arches: An Infrastructure for PSE Development. - Nathan DeBardeleben; Walter B. Ligon III; Ron Sass (HIPS, 2004)

An Analysis of the Cost Effectiveness of an Adaptable Computing Cluster. - Keith D. Underwood; Walter B. Ligon III; Ron R. Sass (Clust. Comput., 2004)

A Virtual Machine for Merit-Based Runtime Reconfiguration. - Brian Greskamp; Ron Sass (FCCM, 2005)

RC-BLAST: Towards a Portable, Cost-Effective Open Source Hardware Implementation. - Krishna Muriki; Keith D. Underwood; Ron Sass (IPDPS, 2005)

Bandwidth Management with a Reconfigurable Data Cache. - Pradeep Nalabalapu; Ron Sass (IPDPS, 2005)

The Case for High Level Programming Models for Reconfigurable Computers. - David L. Andrews 001; Ron Sass; Erik K. Anderson; Jason Agron; Wesley Peck; Jim Stevens; Fabrice Baijot; Ed Komp (ERSA, 2006)

Enabling a Uniform Programming Model Across the Software/Hardware Boundary. - Erik K. Anderson; Jason Agron; Wesley Peck; Jim Stevens; Fabrice Baijot; Ed Komp; Ron Sass; David Andrews 001 (FCCM, 2006)

Run-Time Services for Hybrid CPU/FPGA Systems on Chip. - Jason Agron; Wesley Peck; Erik K. Anderson; David Andrews 001; Ed Komp; Ron Sass; Fabrice Baijot; Jim Stevens (RTSS, 2006)

Online architectures: A theoretical formulation and experimental prototype. - Ron Sass; Brian Greskamp; Brian Leonard; Jeff Young; Srinivas Beeravolu (Microprocess. Microsystems, 2006)

RBoot: Software Infrastructure for a Remote FPGA Laboratory. - Kushal Datta; Ron Sass (FCCM, 2007)

Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. - Ron Sass; William V. Kritikos; Andrew G. Schmidt; Srinivas Beeravolu; Parag Beeraka (FCCM, 2007)

Quantifying Effective Memory Bandwidth of Platform FPGAs. - Andrew G. Schmidt; Ron Sass (FCCM, 2007)

Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. - Andrew G. Schmidt; Ron Sass (FPL, 2007)

FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. - Yamuna Rajasekhar; Yashodhan Phatak; Andrew G. Schmidt; William V. Kritikos; Ron Sass (FCCM, 2008)

Reconfigurable Computing Cluster Project: Phase I Brief. - Andrew G. Schmidt; William V. Kritikos; Siddhartha Datta; Ron Sass (FCCM, 2008)

Teaching FPGA system design via a remote laboratory facility. - Yamuna Rajasekhar; William V. Kritikos; Andrew G. Schmidt; Ron Sass (FPL, 2008)

A Hardware Filesystem Implementation for High-Speed Secondary Storage. - Ashwin A. Mendon; Ron Sass (ReConFig, 2008)

Achieving Programming Model Abstractions for Reconfigurable Computing. - David Andrews 001; Ron Sass; Erik K. Anderson; Jason Agron; Wesley Peck; Jim Stevens; Fabrice Baijot; Ed Komp (IEEE Trans. Very Large Scale Integr. Syst., 2008)

RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function. - Siddhartha Datta; Parag Beeraka; Ron Sass (FCCM, 2009)

AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. - Andrew G. Schmidt; William V. Kritikos; Rahul R. Sharma; Ron Sass (FCCM, 2009)

A parallel/vectorized double-precision exponential core to accelerate computational science applications. - Robin Pottathuparambil; Ron Sass (FPGA, 2009)

Hardware implementation of MPI_Barrier on an FPGA cluster. - Shanyuan Gao; Andrew G. Schmidt; Ron Sass (FPL, 2009)

Scalability Studies of the BLASTn Scan and Ungapped Extension Functions. - Siddhartha Datta; Ron Sass (ReConFig, 2009)

A Hardware Filesystem Implementation with Multidisk Support. - Ashwin A. Mendon; Andrew G. Schmidt; Ron Sass (Int. J. Reconfigurable Comput., 2009)

Building problem-solving environments with the Arches framework. - Nathan DeBardeleben; Ron Sass; Daniel C. Stanzione Jr.; Walter B. Ligon III (J. Syst. Softw., 2009)

Impact of reconfigurable hardware on accelerating MPI_Reduce. - Shanyuan Gao; Andrew G. Schmidt; Ron Sass (FPT, 2010)

FPGA-based three-body molecular dynamics simulator. - Robin Pottathuparambil; Ron Sass (HPCS, 2010)

Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. - Andrew G. Schmidt; William V. Kritikos; Ron Sass; Erik K. Anderson; Matthew French (ReConFig, 2010)

Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring. - Bin Huang; Andrew G. Schmidt; Ashwin A. Mendon; Ron Sass (HPRCTA@SC, 2010)

Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. - Andrew G. Schmidt; Bin Huang; Ron Sass; Matthew French (FCCM, 2011)

A Radix Tree Router for Scalable FPGA Networks. - William V. Kritikos; Yamuna Rajasekhar; Andrew G. Schmidt; Ron Sass (FPL, 2011)

Design of a scalable digital Wireless Channel Emulator for networking radios. - Scott Buscemi; Ron Sass (MILCOM, 2011)

Reconfigurable Computing Cluster - A Five-Year Perspective of the Project. - Ron Sass; Andrew G. Schmidt; Scott Buscemi (PARCO, 2011)

Improving FPGA Design and Evaluation Productivity with a Hardware Performance Monitoring Infrastructure. - Andrew G. Schmidt; Ron Sass (ReConFig, 2011)

Design and implementation of a hardware checkpoint/restart core. - Ashwin A. Mendon; Ron Sass; Zachary K. Baker; Justin L. Tripp (DSN Workshops, 2012)

An Extensible and Portable Tool Suite for Managing Multi-Node FPGA Systems. - Yamuna Rajasekhar; Rahul R. Sharma; Ron Sass (FCCM, 2012)

Design and utilization of an FPGA cluster to implement a Digital Wireless Channel Emulator. - Scott Buscemi; Ron Sass (FPL, 2012)

A high performance, open source SATA2 core. - Ashwin A. Mendon; Bin Huang; Ron Sass (FPL, 2012)

A case study of streaming storage format for sparse matrices. - Shweta Jain-Mendon; Ron Sass (ReConFig, 2012)

Exploring hardware work queue support for lightweight threads in MPSoCs. - Rahul R. Sharma; Yamuna Rajasekhar; Ron Sass (ReConFig, 2012)

Selected Papers from the International Conference on Reconfigurable Computing and FPGAs (ReConFig'10). - Claudia Feregrino; Miguel Arias; Kris Gaj; Viktor K. Prasanna; Marco D. Santambrogio; Ron Sass (Int. J. Reconfigurable Comput., 2012)

Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. - William V. Kritikos; Andrew G. Schmidt; Ron Sass; Erik K. Anderson; Matthew French (Int. J. Reconfigurable Comput., 2012)

An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. - Andrew G. Schmidt; William V. Kritikos; Shanyuan Gao; Ron Sass (Int. J. Reconfigurable Comput., 2012)

HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs. - Andrew G. Schmidt; Neil Steiner; Matthew French; Ron Sass (Int. J. Reconfigurable Comput., 2012)

Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. - Andrew G. Schmidt; Siddhartha Datta; Ashwin A. Mendon; Ron Sass (Parallel Comput., 2012)

PyDac: A Resilient Run-Time Framework for Divide-and-Conquer Applications on a Heterogeneous Many-Core Architecture. - Bin Huang; Ron Sass; Nathan DeBardeleben; Sean Blanchard (Euro-Par Workshops, 2013)

A Novel Memory Subsystem and Computational Model for Parallel Reconfigurable Architectures. - Yamuna Rajasekhar; Ron Sass (Euro-Par Workshops, 2013)

A Range and Scaling Study of an FPGA-Based Digital Wireless Channel Emulator. - Scott Buscemi; William V. Kritikos; Ron Sass (FCCM, 2013)

The Impact of Hardware Communication on a Heterogeneous Computing System. - Shanyuan Gao; Bin Huang; Ron Sass (FCCM, 2013)

Performance evaluation of Sparse Matrix-Matrix Multiplication. - Shweta Jain-Mendon; Ron Sass (FPL, 2013)

Harnessing Unreliable Cores in Heterogeneous Architecture: The PyDac Programming Model and Runtime. - Bin Huang; Ron Sass; Nathan DeBardeleben; Sean Blanchard (DSN, 2014)

RAW Introduction and Committees. - Jürgen Becker 001; Ramachandran Vaidyanathan; Marco D. Santambrogio; Jim Tørresen; Ron Sass; Philip Heng Wai Leong (IPDPS Workshops, 2014)

Architecture and applications for an All-FPGA parallel computer. - Yamuna Rajasekhar; Ron Sass (Clust. Comput., 2014)

A hardware-software co-design approach for implementing sparse matrix vector multiplication on FPGAs. - Shweta Jain-Mendon; Ron Sass (Microprocess. Microsystems, 2014)

Bridging the Gap between Advanced Memory and Heterogeneous Architectures. - Abhi D. Rajagopala; Ron Sass; Andrew G. Schmidt; Matthew French (FCCM, 2018)

Volcan: System Integration of HLS and HMC on FPGAs. - Abhi D. Rajagopala; Ron Sass; Andrew G. Schmidt (ReConFig, 2019)