A 2.4GHz hybrid PPF based BFSK receiver with ±180ppm frequency offset tolerance for wireless sensor networks. - Ronghua Ni; Kartikeya Mayaram; Terri S. Fiez (VLSIC, 2012)

A 2.4 GHz Hybrid Polyphase Filter Based BFSK Receiver With High Frequency Offset Tolerance for Wireless Sensor Networks. - Ronghua Ni; Kartikeya Mayaram; Terri S. Fiez (IEEE J. Solid State Circuits, 2013)

A 915MHz, 6Mb/s, 80pJ/b BFSK receiver with -76dBm sensitivity for high data rate wireless sensor networks. - Ronghua Ni; Kartikeya Mayaram; Terri S. Fiez (VLSIC, 2014)

24.8 A 14nm fractional-N digital PLL with 0.14psrms jitter and -78dBc fractional spur for cellular RFICs. - Chih-Wei Yao; Wing Fai Loke; Ronghua Ni; Yongping Han; Haoyang Li; Kunal Godbole; Yongrong Zuo; Sangsoo Ko; Nam-Seog Kim 001; Sangwook Han; Ikkyun Jo; Joonhee Lee; et al. (ISSCC, 2017)

A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration. - Chih-Wei Yao; Ronghua Ni; Chung Lau; Wanghua Wu; Kunal Godbole; Yongrong Zuo; Sangsoo Ko; Nam-Seog Kim 001; Sangwook Han; Ikkyun Jo; Joonhee Lee; Juyoung Han; et al. (IEEE J. Solid State Circuits, 2017)

A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS. - Jongwoo Lee; Sangwook Han; Joonhee Lee; Byoungjoong Kang; Jeongyeol Bae; Jaehyuk Jang; Seunghyun Oh; Su-Seob Ahn; Sanghoon Kang; Quang-Diep Bui; Kiyong Son; Hyungsun Lim; et al. (ISSCC, 2019)

A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS. - Jongwoo Lee; Kiyong Son; Hyungsun Lim; Daechul Jeong; Ilyong Jong; Sanghyun Baek; Jae Hoon Lee; Ronghua Ni; Yongrong Zuo; Chih-Wei Yao; Seungchan Heo; Sangwook Han; et al. (IEEE J. Solid State Circuits, 2019)

A 28-nm 75-fsrms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction. - Wanghua Wu; Chih-Wei Yao; Kunal Godbole; Ronghua Ni; Pei-Yuan Chiang; Yongping Han; Yongrong Zuo; Ashutosh Verma; Ivan Siu-Chuang Lu; Sang Won Son; Thomas Byunghak Cho (IEEE J. Solid State Circuits, 2019)

A 37.5fs-rms Jitter and -254.1dB FoM Fractional-N Sampling PLL with Reference-Phase-Selection and Complementary-DTC Achieving 8× DTC Range Reduction and Zero DTC Delay Offset. - Yanchao Liu; Kaihang Wang; Yang Li; Yuchen Liu; Xiaohua Yu; Ronghua Ni (CICC, 2025)

An Ultra-Low Power 915 MHz LO with Adaptive Frequency Calibration for IoT Wake-Up Receivers. - Xianhong Xiu; Tian Huang; Qianhui Li; Meng Liu; Hao Min; Xiaohua Yu; Ronghua Ni (ISCAS, 2025)