A Multiscale Neural Interface SoC with 89.5-dB DR 4.54μW Analog Frontend and 0.00013 mm2/Ch Spatiotemporal Spike Feature Extractor. - Haoyang Luo; Zongnan Wang; Jingjun Zhu; Zihan Wu 005; Jiarui Wang; Rongjia Bao; Changxuan Dong; Xianya Feng; Youming Yang 002; Bingrui Li; Haikang Diao; Hongji Sun; et al. (CICC, 2026)

A 0.65V 13b 50MS/s Pipelined-SAR ADC with Cyclic Dynamic Amplifier and Bayesian-Based Gain Calibration. - Jiachang Yang; Haoyang Luo; Bingrui Li; Zichen Kong; Zongnan Wang; Jiarui Wang; Rongjia Bao; Haikang Diao; Xiyuan Tang (CICC, 2026)