Single-event performance of differential flip-flop designs and hardening implication. - Rongmei Chen; Enxia Zhang; Bharat L. Bhuva (IOLTS, 2016)

Improved on-chip self-triggered single-event transient measurement circuit design and applications. - Rongmei Chen; Wei Chen; Xiaoqiang Guo; Chen Shen; Fengqi Zhang; Lisang Zheng; Wen Zhao; Lili Ding; Yinhong Luo; Hongxia Guo; Yuanming Wang; Yinong Liu (Microelectron. Reliab., 2017)

Modeling the impact of well contacts on SEE response with bias-dependent Single-Event compact model. - Lili Ding; Wei Chen; Hongxia Guo; Tan Wang; Rongmei Chen; Yinhong Luo; Fengqi Zhang; Xiaoyu Pan (Microelectron. Reliab., 2018)

Single-event multiple transients in guard-ring hardened inverter chains of different layout designs. - Wen Zhao; Chaohui He; Wei Chen; Rongmei Chen; Peitian Cong; Fengqi Zhang; Zujun Wang; Chen Shen; Lisang Zheng; Xiaoqiang Guo; Lili Ding (Microelectron. Reliab., 2018)

Design Enablement of Fine Pitch Face-to-Face 3D System Integration using Die-by-Die Place & Route. - Giuliano Sisto; Peter Debacker; Rongmei Chen; Geert Van der Plas; Richard Chou; Eric Beyne; Dragomir Milojevic (3DIC, 2019)

Online Cooperative Teaching Mode Based on Self-Direction Theory in Method of Sport Science Research. - Rongmei Chen; Siyuan Chen (Int. J. Emerg. Technol. Learn., 2020)

Design And Sign-off Methodologies For Wafer-To-Wafer Bonded 3D-ICs At Advanced Nodes (invited). - Giuliano Sisto; Rongmei Chen; Richard Chou; Geert Van der Plas; Eric Beyne; Rod Metcalfe; Dragomir Milojevic (SLIP, 2021)

Innovations in Transistor Architecture and Device Connectivity for Advanced Logic Scaling. - Anabela Veloso; Geert Eneman; An De Keersgieter; P. Favia; Andriy Hikavyy; Rongmei Chen; Anne Jourdain; N. Horiguchi (ICICDT, 2022)

Opportunities of Chip Power Integrity and Performance Improvement through Wafer Backside (BS) Connection: Invited Paper. - Rongmei Chen; Giuliano Sisto; Odysseas Zografos; Dragomir Milojevic; Pieter Weckx; Geert Van der Plas; Eric Beyne (SLIP, 2022)

Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node. - Rongmei Chen; Giuliano Sisto; Michele Stucchi; Anne Jourdain; Kenichi Miyaguchi; Pieter Schuddinck; P. Woeltgens; H. Lin; Naveen Kakarla; Anabela Veloso; Dragomir Milojevic; Odysseas Zografos; et al. (VLSI Technology and Circuits, 2022)

Scaled FinFETs Connected by Using Both Wafer Sides for Routing via Buried Power Rails. - Anabela Veloso; Anne Jourdain; D. Radisic; Rongmei Chen; G. Arutchelvan; B. O'Sullivan; Hiroaki Arimura; Michele Stucchi; An De Keersgieter; M. Hosseini; T. Hopf; K. D'Have; et al. (VLSI Technology and Circuits, 2022)

Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part I: CNFET Transistor Optimization. - Rongmei Chen; Lin Chen; Jie Liang; Yuanqing Cheng; Souhir Elloumi; Jaehyun Lee; Kangwei Xu; Vihar P. Georgiev; Kai Ni 004; Peter Debacker; Asen Asenov; Aida Todri-Sanial (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part II: CNT Interconnect Optimization. - Rongmei Chen; Lin Chen; Jie Liang; Yuanqing Cheng; Souhir Elloumi; Jaehyun Lee; Kangwei Xu; Vihar P. Georgiev; Kai Ni 004; Peter Debacker; Asen Asenov; Aida Todri-Sanial (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Design Enablement of 3-Dies Stacked 3D-ICs Using Fine-Pitch Hybrid-Bonding and TSVs. - Mohamed Naeim; Hanqi Yang; Pinhong Chen; Rong Bao; Antoine Dekeyser; Giuliano Sisto; Moritz Brunion; Rongmei Chen; Geert Van der Plas; Eric Beyne; Dragomir Milojevic (3DIC, 2023)

A Modeling Study: Applying Carbon-Based Interconnects to BS-PDN Architecture. - Baohui Xu; Rongmei Chen; Jie Liang (ASICON, 2023)

The Promise of 2-D Materials for Scaled Digital and Analog Applications. - Devin Verreck; Piet Wambacq; Maarten Van De Put; Zubair Ahmed; Quentin Smets; Aryan Afzalian; Rutger Duflou; Xiangyu Wu; Gioele Mirabelli; Rongmei Chen; Inge Asselberghs; Gouri Sankar Kar (ISSCC, 2023)

Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node. - Giuliano Sisto; R. Preston; Rongmei Chen; Gioele Mirabelli; Anita Farokhnejad; Yun Zhou; Ivan Ciofi; Anne Jourdain; A. Veloso; Michele Stucchi; Odysseas Zografos; Pieter Weckx; et al. (VLSI Technology and Circuits, 2023)