A floating-point unit using stochastic arithmetic compliant with the IEEE-754 standard. - Roselyne Chotin; Habib Mehrez (ICECS, 2002)

Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions. - François Pêcheux; Liliana Andrade; Marie-Minerve Louërat; Ilias Bournias; Roselyne Chotin; Daniela Genius (FDL, 2020)

High-level Partitioning and Design Space Exploration for Cyber Physical Systems. - Daniela Genius; Ilias Bournias; Ludovic Apvrille; Roselyne Chotin (MODELSWARD, 2020)

Model-Based Virtual Prototyping of CPS: Application to Bio-Medical Devices. - Daniela Genius; Ilias Bournias; Ludovic Apvrille; Roselyne Chotin (MODELSWARD (Revised Selected Papers), 2020)

A HDL Generator for Flexible and Efficient Finite-Field Multipliers on FPGAs. - Joël Cathébras; Roselyne Chotin (WAIFI, 2020)

Toward an Implementation Modeling Methodology for Designing SCA resilient Cryptographic Circuits. - Gabriel Rocherolle; Roselyne Chotin (DTIS, 2021)

FPGA Acceleration of the Horn and Schunck Hierarchical Algorithm. - Ilias Bournias; Roselyne Chotin; Lionel Lacassagne (ISCAS, 2021)

Using HLS for Designing a Parametric Optical Flow Hierarchical Algorithm in FPGAs. - Ilias Bournias; Roselyne Chotin; Lionel Lacassagne (ISCAS, 2022)

Model to Hardware: System-level Modeling for Wearable Devices. - Daniela Genius; Roselyne Chotin (MODELSWARD, 2022)

Improving Integrated Circuit Security Using Mathematical Model Based on Clique Covering Reformulation. - Jonathan Fontaine; Mohamed Benazouz; Lilia Zaourar; Roselyne Chotin (CoDIT, 2023)