A critical look at design guidelines for SOI logic gates. - Rouwaida Kanj; Elyse Rosenbaum (ISCAS (3), 2002)

Noise characterization of static CMOS gates. - Rouwaida Kanj; Timothy Lehner; Bhavna Agrawal; Elyse Rosenbaum (DAC, 2004)

Critical evaluation of SOI design guidelines. - Rouwaida Kanj; Elyse Rosenbaum (IEEE Trans. Very Large Scale Integr. Syst., 2004)

SOI Circuit Design Styles and High-Level Circuit Modeling Techniques - Rouwaida Kanj (2004)

Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events. - Rouwaida Kanj; Rajiv V. Joshi; Sani R. Nassif (DAC, 2006)

SRAM Local Bit Line Access Failure Analyses. - Praveen Elakkumanan; Jente B. Kuang; Kevin J. Nowka; Ramalingam Sridhar; Rouwaida Kanj; Sani R. Nassif (ISQED, 2006)

System-Level SRAM Yield Enhancement. - Fadi J. Kurdahi; Ahmed M. Eltawil; Young-Hwan Park; Rouwaida Kanj; Sani R. Nassif (ISQED, 2006)

A Disturb Decoupled Column Select 8T SRAM Cell. - Vinod Ramadurai; Rajiv V. Joshi; Rouwaida Kanj (CICC, 2007)

A floating-body dynamic supply boosting technique for low-voltage sram in nanoscale PD/SOI CMOS technologies. - Rajiv V. Joshi; Rouwaida Kanj; Keunwoo Kim; Richard Q. Williams; Ching-Te Chuang (ISLPED, 2007)

Cross Layer Error Exploitation for Aggressive Voltage Scaling. - Amin Khajeh Djahromi; Ahmed M. Eltawil; Fadi J. Kurdahi; Rouwaida Kanj (ISQED, 2007)

Gate Leakage Effects on Yield and Design Considerations of PD/SOI SRAM Designs. - Rouwaida Kanj; Rajiv V. Joshi; Jayakumaran Sivagnaname; Jente B. Kuang; Dhruva Acharyya; Tuyet Nguyen; Chandler McDowell; Sani R. Nassif (ISQED, 2007)

SRAM methodology for yield and power efficiency: per-element selectable supplies and memory reconfiguration schemes. - Rouwaida Kanj; Rajiv V. Joshi; Zhuo Li 001; Jente B. Kuang; Hung C. Ngo; Nancy Ying Zhou; Weiping Shi; Sani R. Nassif (ISLPED, 2008)

Statistical Evaluation of Split Gate Opportunities for Improved 8T/6T Column-Decoupled SRAM Cell Yield. - Rouwaida Kanj; Rajiv V. Joshi; Keunwoo Kim; Richard Williams; Sani R. Nassif (ISQED, 2008)

A Root-Finding Method for Assessing SRAM Stability. - Rouwaida Kanj; Zhuo Li 001; Rajiv V. Joshi; Frank Liu 001; Sani R. Nassif (ISQED, 2008)

Yield estimation of SRAM circuits using "Virtual SRAM Fab". - Aditya Bansal; Rama N. Singh; Rouwaida Kanj; Saibal Mukhopadhyay; Jin-Fuw Lee; Emrah Acar; Amith Singhee; Keunwoo Kim; Ching-Te Chuang; Sani R. Nassif; Fook-Luen Heng; Koushik K. Das (ICCAD, 2009)

An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects. - Rouwaida Kanj; Rajiv V. Joshi; Chad Adams; James D. Warnock; Sani R. Nassif (ICCAD, 2009)

Statistical yield analysis of silicon-on-insulator embedded DRAM. - Rouwaida Kanj; Rajiv V. Joshi; Jente B. Kuang; J. Kim; Mesut Meterelliyoz; William R. Reohr; Sani R. Nassif; Kevin J. Nowka (ISQED, 2009)

The impact of BEOL lithography effects on the SRAM cell performance and yield. - Nancy Ying Zhou; Rouwaida Kanj; Kanak Agarwal 001; Zhuo Li 001; Rajiv V. Joshi; Sani R. Nassif; Weiping Shi (ISQED, 2009)

Statistical leakage modeling for accurate yield analysis: the CDF matching method and its alternatives. - Rouwaida Kanj; Rajiv V. Joshi; Sani R. Nassif (ISLPED, 2010)

Use of scalable Parametric Measurement Macro to improve semiconductor technology characterization and product test. - Jeanne Bickford; Nazmul Habib; John Goss; Robert McMahon; Rajiv V. Joshi; Rouwaida Kanj (ISQED, 2010)

FinFET SRAM Design. - Rajiv V. Joshi; Keunwoo Kim; Rouwaida Kanj (VLSI Design, 2010)

The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane. - Rajiv V. Joshi; Rouwaida Kanj; Anthony Pelella; Arthur Tuminaro; Yuen H. Chan (IEEE Des. Test Comput., 2010)

Universal statistical cure for predicting memory loss. - Rajiv V. Joshi; Rouwaida Kanj; Peiyuan Wang; Hai Li 001 (ICCAD, 2011)

Accelerated statistical simulation via on-demand Hermite spline interpolations. - Rouwaida Kanj; Tong Li; Rajiv V. Joshi; Kanak Agarwal 001; Ali Sadigh; David Winston; Sani R. Nassif (ICCAD, 2011)

A Novel Column-Decoupled 8T Cell for Low-Power Differential and Domino-Based SRAM Design. - Rajiv V. Joshi; Rouwaida Kanj; Vinod Ramadurai (IEEE Trans. Very Large Scale Integr. Syst., 2011)

The Impact of Statistical Leakage Models on Design Yield Estimation. - Rouwaida Kanj; Rajiv V. Joshi; Sani R. Nassif (VLSI Design, 2011)

Yield estimation via multi-cones. - Rouwaida Kanj; Rajiv V. Joshi; Zhuo Li 001; Jerry Hayes; Sani R. Nassif (DAC, 2012)

A thermal and process variation aware MTJ switching model and its applications in soft error analysis. - Peiyuan Wang; Wei Zhang 012; Rajiv V. Joshi; Rouwaida Kanj; Yiran Chen 001 (ICCAD, 2012)

A novel sample reuse methodology for fast statistical simulations with applications to manufacturing variability. - Rouwaida Kanj; Rajiv V. Joshi (ISQED, 2012)

Isolated Preset Architecture for a 32nm SOI embedded DRAM macro. - John Barth 001; Don Plass; Adis Vehabovic; Rajiv V. Joshi; Rouwaida Kanj; Steven Burns 001; Todd Weaver (VLSIC, 2012)

Low Cost Arduino/Android-Based Energy-Efficient Home Automation System with Smart Task Scheduling. - Kim Baraka; Marc Ghobril; Sami Malek; Rouwaida Kanj; Ayman I. Kayssi (CICSyN, 2013)

Hardware-corroborated Variability-Aware SRAM Methodology. - Rajiv V. Joshi; Rouwaida Kanj; S. Butt; Emrah Acar; Dallas Lea; D. Sciacca (VLSI Design, 2013)

Robust bias temperature instability refresh design and methodology for memory cell recovery. - Gerard Touma; Rouwaida Kanj; Rajiv V. Joshi; Ayman I. Kayssi; Ali Chehab (ICICDT, 2014)

Statistical methodology for modeling non-IID memory fails events. - Sabine Francis; Rouwaida Kanj; Rajiv V. Joshi; Ayman I. Kayssi; Ali Chehab (ISQED, 2014)

Impact of FinFET technology for power gating in nano-scale design. - Keunwoo Kim; Rouwaida Kanj; Rajiv V. Joshi (ISQED, 2014)

PUF and ID-based key distribution security framework for advanced metering infrastructures. - Vahe Seferian; Rouwaida Kanj; Ali Chehab; Ayman I. Kayssi (SmartGridComm, 2014)

Separation of concerns for hardware components of embedded systems in BIP. - Maya H. Safieddine; Rouwaida Kanj; Fadi A. Zaraket; Ali S. Elzein; Mohamad Jaber 001 (ISQED, 2015)

Corrections to "Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction". - Rajiv V. Joshi; Rouwaida Kanj (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Super Fast Physics-Based Methodology for Accurate Memory Yield Prediction. - Rajiv V. Joshi; Keunwoo Kim; Rouwaida Kanj; Ajay N. Bhoj; Matthew M. Ziegler; Phil Oldiges; Pranita Kerber; Robert Wong; Terence Hook; Sudesh Saroop; Carl Radens; Chun-Chen Yeh (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Efficient analog circuit optimization using sparse regression and error margining. - Mohamed Baker Alawieh; Fa Wang; Rouwaida Kanj; Xin Li 001; Rajiv V. Joshi (ISQED, 2016)

Automated FPGA implementations of BIP designs. - Maya H. Safieddine; Fadi A. Zaraket; Mohamad Jaber 001; Rouwaida Kanj; Mazen A. R. Saghir (SIES, 2016)

Bayesian Model Fusion: Large-Scale Performance Modeling of Analog and Mixed-Signal Circuits by Reusing Early-Stage Data. - Fa Wang; Paolo Cachecho; Wangyang Zhang; Shupeng Sun; Xin Li 001; Rouwaida Kanj; Chenjie Gu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

A Universal Hardware-Driven PVT and Layout-Aware Predictive Failure Analytics for SRAM. - Rajiv V. Joshi; Sudesh Saroop; Rouwaida Kanj; Yang Liu; Weike Wang; Carl Radens; Yue Tan; Karthik Yogendra (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Yield and energy tradeoffs of an NVLatch design using radial sampling. - Adam Issa; Rouwaida Kanj; Ali Chehab; Rajiv V. Joshi (ICICDT, 2017)

Regularized logistic regression for fast importance sampling based SRAM yield analysis. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi; Maria Malik; Ali Chehab (ISQED, 2017)

Low power GDI ALU design with mixed logic adder functionality. - Jean Abou Rahal; Bassel Maamari; Basma Hajri; Rouwaida Kanj; Mohammad M. Mansour; Ali Chehab (ICICDT, 2018)

Double error cellular automata-based error correction with skip-mode compact syndrome coding for resilient PUF design. - Anthony Mattar El Raachini; Hussein Alawieh; Adam Issa; Zainab Swaidan; Rouwaida Kanj; Ali Chehab; Mazen A. R. Saghir (ISQED, 2018)

Identity Based Key Distribution Framework for Link Layer Security of AMI Networks. - Vahe Seferian; Rouwaida Kanj; Ali Chehab; Ayman I. Kayssi (IEEE Trans. Smart Grid, 2018)

Sparse Regression Driven Mixture Importance Sampling for Memory Design. - Maria Malik; Rajiv V. Joshi; Rouwaida Kanj; Shupeng Sun; Houman Homayoun; Tong Li (IEEE Trans. Very Large Scale Integr. Syst., 2018)

RRAM Endurance and Retention: Challenges, Opportunities and Implications on Reliable Design. - Zainab Swaidan; Rouwaida Kanj; Johnny El Hajj; Edward Saad; Fadi J. Kurdahi (ICECS, 2019)

Data Imbalance Handling Approaches for Accurate Statistical Modeling and Yield Analysis of Memory Designs. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi (ISCAS, 2019)

Verification at RTL Using Separation of Design Concerns. - Maya H. Safieddine; Fadi A. Zaraket; Rouwaida Kanj; Ali S. Elzein; Wolfgang Roesner (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Threshold Switch Modeling for Analog CAM Design. - Jinane Bazzi; Mohammed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil (ICM, 2020)

Hybrid Importance Splitting Importance Sampling Methodology for Fast Yield Analysis of Memory Designs. - Mariam Rakka; Rouwaida Kanj; Ragheb Raad (ISCAS, 2020)

Importance Splitting Sample Point Reuse for Efficient Memory Yield Estimation. - Mariam Rakka; Rouwaida Kanj (ISCAS, 2021)

Efficient Noise Mitigation Technique for Quantum Computing. - Ali Shaib; Mohamad H. Naim; Mohammed E. Fouda; Rouwaida Kanj; Fadi J. Kurdahi (CoRR, 2021)

In-memory Multi-valued Associative Processor. - Mira Hout; Mohammed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil (CoRR, 2021)

Design Exploration of Sensing Techniques in 2T-2R Resistive Ternary CAMs. - Mariam Rakka; Mohamed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil; Fadi J. Kurdahi (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Secure MIMO D2D communication based on a lightweight and robust PLS cipher scheme. - Hassan N. Noura; Reem Melki; Rouwaida Kanj; Ali Chehab (Wirel. Networks, 2021)

1T1R In-Memory Compute for Winner Takes All Application in Kohonen Neural Networks. - Aya Mouallem; Hussein Fadlallah; Lina Bacha; Dana El Hajj; Rachid Jamil; Dana Bazazo; Rouwaida Kanj (ISCAS, 2022)

Efficient Analog CAM Design. - Jinane Bazzi; Jana Sweidan; Mohammed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil (CoRR, 2022)

DNA Pattern Matching Acceleration with Analog Resistive CAM. - Jinane Bazzi; Jana Sweidan; Mohammed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil (CoRR, 2022)

Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi; Ali Chehab (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

High-Density FeFET-based CAM Cell Design Via Multi-Dimensional Encoding. - Hadi Noureddine; Omar Bekdache; Mohamad Al Tawil; Rouwaida Kanj; Ali Chehab; Mohammed E. Fouda; Ahmed M. Eltawil (ACM Great Lakes Symposium on VLSI, 2023)

Hardware Acceleration of DNA Pattern Matching with Binary Memristors. - Jinane Bazzi; Mohammed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil (ISCAS, 2023)

Scalable Complementary FeFET CAM Design. - Omar Bekdache; Hadi Noureddine; Mohamad Al Tawil; Rouwaida Kanj; Mohamed E. Fouda; Ahmed M. Eltawil (ISCAS, 2023)

Hardware Implementation and Evaluation of an Information Processing Factory. - Walaa Amer; Mariam Rakka; Rachid Karami; Minjun Seo; Mazen A. R. Saghir; Rouwaida Kanj; Fadi J. Kurdahi (VLSI-SoC, 2023)

AudioFool: Fast, Universal and synchronization-free Cross-Domain Attack on Speech Recognition. - Mohamad Fakih; Rouwaida Kanj; Fadi J. Kurdahi; Mohammed E. Fouda (CoRR, 2023)

DT2CAM: A Decision Tree to Content Addressable Memory Framework. - Mariam Rakka; Mohammed E. Fouda; Rouwaida Kanj; Fadi J. Kurdahi (IEEE Trans. Emerg. Top. Comput., 2023)

A Portable Non-Invasive Electromagnetic Lesion-Optimized Sensing Device for the Diagnosis of Skin Cancer (SkanMD). - Nader Shafi; Joseph Costantine; Rouwaida Kanj; Youssef Tawk; Ali Ramadan; Mazen Kurban; Jihane Abou Rahal; Assaad A. Eid (IEEE Trans. Biomed. Circuits Syst., 2023)

A Best Balance Ratio Ordered Feature Selection Methodology for Robust and Fast Statistical Analysis of Memory Designs. - Lama Shaer; Rouwaida Kanj; Rajiv V. Joshi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Reconfigurable Precision SRAM-based Analog In-memory-compute Macro Design. - Jinane Bazzi; Rachid Jamil; Dana El Hajj; Rouwaida Kanj; Mohammed E. Fouda; Ahmed M. Eltawil (ISCAS, 2024)

A 5T Half-SRAM Design for Cold CMOS Physical Unclonable Function Applications and Beyond. - Rouwaida Kanj; Jamil Kawa (ISQED, 2024)

nvXNOR Design with Enhanced Store Capability for BNN Applications. - Zeinab Soueidan; Rouwaida Kanj (ISQED, 2024)

Variability-Aware Design of RRAM-Based Analog CAMs. - Jinane Bazzi; Jana Sweidan; Mohammed E. Fouda; Rouwaida Kanj; Ahmed M. Eltawil (IEEE Access, 2024)

A Novel Full Adder Design Using Hybrid Memristor Ratioed Logic. - Hussein Fadlallah; Rouwaida Kanj; Basma Hajri (ISQED, 2025)

Ternary-Valued Associative Processor Design. - Mira Hout; Rouwaida Kanj; Ahmed M. Eltawil; Mohammed E. Fouda (ISQED, 2025)

Weighted Vertex Cover Using Disjoint Set Data Structures for the Memory Reconfiguration Problem. - Rouwaida Kanj (ISQED, 2025)