Effects of Long-Term Clock Instability on Master-Slave Networks. - Roy D. Cideciyan; William C. Lindsey (IEEE Trans. Commun., 1987)

False lock in quadriphase receivers with unequal I- and Q-channel data rates. - Roy D. Cideciyan; James J. M. Wang; William C. Lindsey (IEEE Trans. Commun., 1989)

On codes satisfying M th-order running digital sum constraints. - Evangelos Eleftheriou; Roy D. Cideciyan (IEEE Trans. Inf. Theory, 1991)

A PRML System for Digital Magnetic Recording. - Roy D. Cideciyan; François Dolivo; Reto Hermann; Walter Hirt; Wolfgang Schott (IEEE J. Sel. Areas Commun., 1992)

The IBM Zurich Research Laboratory's 1.13 Gb/s LAN/MAN Prototype. - Erwin A. Zurfluh; Roy D. Cideciyan; P. Dill; R. Heller; Wolfram W. Lemppenau; Peter Mueller; Hans R. Schindler; Pitro Zafiropulo (Comput. Networks ISDN Syst., 1993)

Concatenated Coding Scheme for Reliable Data Transmission in CDMA Cellular Systems. - Roy D. Cideciyan; Evangelos Eleftheriou (Mobile Communications, 1994)

Concatenated Reed-Solomon/convolutional coding scheme for data transmission in CDMA cellular systems. - Roy D. Cideciyan; Evangelos Eleftheriou (VTC, 1994)

Codes preventing quasi-catastrophic error propagation in partial-response systems. - Roy D. Cideciyan; Sedat Ölçer (IEEE Trans. Inf. Theory, 1995)

Concatenated Reed-Solomon/convolutional coding for data transmission in CDMA-based cellular systems. - Roy D. Cideciyan; Evangelos Eleftheriou; Marcel Rupf (IEEE Trans. Commun., 1997)

Performance analysis of magnetic recording systems. - Roy D. Cideciyan; Evangelos Eleftheriou; Stefano Tomasin (ICC, 2001)

Maximum transition run codes for generalized partial response channels. - Roy D. Cideciyan; Evangelos Eleftheriou; Brian H. Marcus; Dharmendra S. Modha (IEEE J. Sel. Areas Commun., 2001)

Codes satisfying maximum transition run and parity-check constraints. - Roy D. Cideciyan; Evangelos Eleftheriou (ICC, 2004)

Average transition density constraints for mitigating transition noise in magnetic recording. - Roy D. Cideciyan; Thomas Mittelholzer (ISIT, 2004)

Enumerative Encoding with Non-Uniform Modulation Constraints. - Mario Blaum; Roy D. Cideciyan; Evangelos Eleftheriou; Rick Galbraith; Ksenija Lakovic; Thomas Mittelholzer; Travis Oenning; Bruce A. Wilson (ISIT, 2007)

Scaling tape-recording areal densities to 100 Gb/in2. - Armando J. Argumedo; David Berman; Robert G. Biskeborn; Giovanni Cherubini; Roy D. Cideciyan; Evangelos Eleftheriou; Walter Häberle; Diana J. Hellman; Robert A. Hutchins; Wayne Imaino; Jens Jelitto; Kevin Judd; et al. (IBM J. Res. Dev., 2008)

Frame Synchronization for PPM-Encoded Longitudinal Position Words in Magnetic Tape Storage. - Giovanni Cherubini; Roy D. Cideciyan; Evangelos Eleftheriou; Jens Jelitto (GLOBECOM, 2009)

Next generation backplane and copper cable challenges. - Roy D. Cideciyan; Mark Gustlin; Mike Peng Li; John Wang; Zhongfeng Wang (IEEE Commun. Mag., 2013)

Partial reverse concatenation for data storage. - Roy D. Cideciyan; Robert A. Hutchins; Thomas Mittelholzer; Sedat Ölçer (APSIPA, 2014)

Enumerative modulation codes based on sliding-window substitutions. - Thomas Mittelholzer; Roy D. Cideciyan (ISIT, 2014)

High-speed link with trellis-coded modulation and Reed-Solomon coding. - Hazar Yueksel; Giovanni Cherubini; Roy D. Cideciyan; Simeon Furrer; Andreas Burg 001; Thomas Toifl (CSCN, 2016)

A 4.1 pJ/b 25.6 Gb/s 4-PAM reduced-state sliding-block Viterbi detector in 14 nm CMOS. - Hazar Yueksel; Matthias Braendli; Andreas Burg 001; Giovanni Cherubini; Roy D. Cideciyan; Pier Andrea Francese; Simeon Furrer; Marcel A. Kossel; Lukas Kull; Danny Luu; Christian Menolfi; Thomas Morf; et al. (ESSCIRC, 2016)

Design considerations on sliding-block viterbi detectors for high-speed data transmission. - Hazar Yueksel; Giovanni Cherubini; Roy D. Cideciyan; Andreas Burg 001; Thomas Toifl (ICSPCS, 2016)

Shortened Cyclic Codes for Correcting and Detecting Burst Errors. - Roy D. Cideciyan; Simeon Furrer; Mark A. Lantz (ISITA, 2018)

Design Techniques for High-Speed Multi-Level Viterbi Detectors and Trellis-Coded-Modulation Decoders. - Hazar Yueksel; Matthias Braendli; Andreas Burg 001; Giovanni Cherubini; Roy D. Cideciyan; Pier Andrea Francese; Simeon Furrer; Marcel A. Kossel; Lukas Kull; Danny Luu; Christian Menolfi; Thomas Morf; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)