On Performance and Space Usage Improvements for Parallelized Compiled APL Code. - Dz-Ching Ju; Wai-Mee Ching; Chuan-lin Wu (APL, 1991)

Exploitation of APL Data Parallelism on a Shared-memory MIMD Machine. - Dz-Ching Ju; Wai-Mee Ching (PPoPP, 1991)

Execution of automatically parallelized APL programs on RP3. - Wai-Mee Ching; Dz-Ching Ju (IBM J. Res. Dev., 1991)

The Synthesis of Array Functions and Its Use in Parallel Computation. - Dz-Ching Ju; Chuan-lin Wu; Paul R. Carini (ICPP (2), 1992)

A Primitive-Based Strategy for Producing Efficient Code for Very High Level Programs. - Wai-Mee Ching; Paul R. Carini; Dz-Ching Ju (Comput. Lang., 1993)

An APL-to-C compiler for the IBM RISC System/6000: compilation, performance and limitations. - Wai-Mee Ching; Dz-Ching Ju (ACM SIGAPL APL Quote Quad, 1993)

A compiler framework for restructuring data declarations to enhance cache and TLB effectiveness. - David F. Bacon; Jyh-Herng Chow; Dz-Ching Ju; Kalyan Muthukumar; Vivek Sarkar (CASCON, 1994)

Statement Merge: an Inter-Statement Optimization of Array Language Programs. - Dz-Ching Ju; Chuan-lin Wu; Paul R. Carini (ICPP (2), 1994)

The Classification, Fusion, and Parallelization of Array Language Primitives. - Dz-Ching Ju; Chuan-lin Wu; Paul R. Carini (IEEE Trans. Parallel Distributed Syst., 1994)

An Array Operation Synthesis Scheme to Optimize Fortran 90 Programs. - Gwan-Hwan Hwang; Jenq Kuen Lee; Roy Dz-Ching Ju (PPoPP, 1995)

Array Operation Synthesis to Optimize HPF Programs. - Gwan-Hwan Hwang; Jenq Kuen Lee; Roy Dz-Ching Ju (ICPP, Vol. 3, 1996)

Global Predicate Analysis and Its Application to Register Allocation. - David M. Gillies; Roy Dz-Ching Ju; Richard Johnson; Michael S. Schlansker (MICRO, 1996)

Algorithm and Hardware Support for Branch Anticipation. - Ted Zhihong Yu; Edwin Hsing-Mean Sha; Nelson L. Passos; Roy Dz-Ching Ju (Great Lakes Symposium on VLSI, 1997)

Integrating Automatic Data Alignment and Array Operation Synthesis to Optimize Data Parallel Programs. - Gwan-Hwan Hwang; Jenq Kuen Lee; Roy Dz-Ching Ju (LCPC, 1997)

A New Algorithm for Scalar Register Promotion based on SSA Form. - A. V. S. Sastry; Roy Dz-Ching Ju (PLDI, 1998)

A Function-Composition Approach to Synthesize Fortran 90 Array Operations. - Gwan-Hwan Hwang; Jenq Kuen Lee; Roy Dz-Ching Ju (J. Parallel Distributed Comput., 1998)

Translating Out of Static Single Assignment Form. - Vugranam C. Sreedhar; Roy Dz-Ching Ju; David M. Gillies; Vatsa Santhanam (SAS, 1999)

Probabilistic memory disambiguation and its application to data speculation. - Roy Dz-Ching Ju; Jean-Francois Collard; Karim Oukbir (SIGARCH Comput. Archit. News, 1999)

A Unified Compiler Framework for Control and Data Speculation. - Roy Dz-Ching Ju; Kevin Nomura; Uma Mahadevan; Le-Chun Wu (IEEE PACT, 2000)

Applying Data Speculation in Modulo Scheduled Loops. - Uma Mahadevan; Kevin Nomura; Roy Dz-Ching Ju; Rick Hank (IEEE PACT, 2000)

Partial Redundancy Elimination on Predicated Code. - Jens Knoop; Jean-Francois Collard; Roy Dz-Ching Ju (SAS, 2000)

Locality vs. criticality. - Srikanth T. Srinivasan; Roy Dz-Ching Ju; Alvin R. Lebeck; Chris Wilkerson (ISCA, 2001)

Probabilistic Points-to Analysis. - Yuan-Shin Hwang; Peng-Sheng Chen; Jenq Kuen Lee; Roy Dz-Ching Ju (LCPC, 2001)

Array Operation Synthesis to Optimize HPF Programs on Distributed Memory Machines. - Gwan-Hwan Hwang; Jenq Kuen Lee; Roy Dz-Ching Ju (J. Parallel Distributed Comput., 2001)

A Region-Based Compilation Infrastructure. - Yang Liu; Zhaoqing Zhang; Ruliang Qiao; Roy Dz-Ching Ju (Interaction between Compilers and Computer Architectures, 2003)

Efficient Resource Management during Instruction Scheduling for the EPIC Architecture. - Dong-yuan Chen; Lixia Liu; Chen Fu; Shuxin Yang; Chengyong Wu; Roy Dz-Ching Ju (IEEE PACT, 2003)

Inter-procedural stacked register allocation for itanium® like architecture. - Liu Yang; Sun Chan; Guang R. Gao; Roy Ju; Guei-Yuan Lueh; Zhaoqing Zhang (ICS, 2003)

Performance potentials of compiler-directed data speculation. - Youfeng Wu; Li-Ling Chen; Roy Ju; Jesse Fang (ISPASS, 2003)

A compiler framework for speculative analysis and optimizations. - Jin Lin; Tong Chen 010; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai; Sun Chan (PLDI, 2003)

Compiler support for speculative multithreading architecture with probabilistic points-to analysis. - Peng-Sheng Chen; Ming-Yu Hung; Yuan-Shin Hwang; Roy Dz-Ching Ju; Jenq Kuen Lee (PPoPP, 2003)

Segmented Alignment: An Enhanced Model to Align Data Parallel Programs of HPF. - Gwan-Hwan Hwang; Cheng-Wei Chen; Jenq Kuen Lee; Roy Dz-Ching Ju (J. Supercomput., 2003)

A Compiler Framework for Recovery Code Generation in General Speculative Optimizations. - Jin Lin; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai (IEEE PACT, 2004)

An Overview of the Open Research Compiler. - Chengyong Wu; Ruiqi Lian; Junchao Zhang; Roy Ju; Sun Chan; Lixia Liu; Xiaobing Feng 002; Zhaoqing Zhang (LCPC, 2004)

XTREM: a power simulator for the Intel XScale® core. - Gilberto Contreras; Margaret Martonosi; Jinzhan Peng; Roy Ju; Guei-Yuan Lueh (LCTES, 2004)

Efficient Modeling of Itanium Architecture during Instruction Scheduling using Extended Finite State Automata. - Dong-yuan Chen; Lixia Liu; Roy Dz-Ching Ju; Chen Fu; Shuxin Yang; Chengyong Wu (J. Instr. Level Parallelism, 2004)

A compiler framework for speculative optimizations. - Jin Lin; Tong Chen 010; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai; Sun Chan (ACM Trans. Archit. Code Optim., 2004)

Interprocedural Probabilistic Pointer Analysis. - Peng-Sheng Chen; Yuan-Shin Hwang; Roy Dz-Ching Ju; Jenq Kuen Lee (IEEE Trans. Parallel Distributed Syst., 2004)

Optimizing structures in object oriented programs. - Kaiyu Chen; Sun Chan; Roy Dz-Ching Ju; Peng Tu (Interaction between Compilers and Computer Architectures, 2005)

Optimizing Packet Accesses for a Domain Specific Language on Network Processors. - Tao Liu; Xiao-Feng Li; Lixia Liu; Chengyong Wu; Roy Ju (LCPC, 2005)

POV-Ray Parallelization and Optimization: An Experience Report. - Chen Yang; Yongjian Chen; Xiong Fu; Chu-Cheow Lim; Roy Ju (PDPTA, 2005)

Shangri-La: achieving high performance from compiled network applications while enabling ease of programming. - Michael K. Chen 001; Xiao-Feng Li; Ruiqi Lian; Jason H. Lin; Lixia Liu; Tao Liu; Roy Ju (PLDI, 2005)

Recovery code generation for general speculative optimizations. - Jin Lin; Wei-Chung Hsu; Pen-Chung Yew; Roy Dz-Ching Ju; Tin-Fook Ngai (ACM Trans. Archit. Code Optim., 2006)

A Throughput-Driven Task Creation and Mapping for Network Processors. - Lixia Liu; Xiao-Feng Li; Michael K. Chen 001; Roy Dz-Ching Ju (HiPEAC, 2007)

The XTREM power and performance simulator for the Intel XScale core: Design and experiences. - Gilberto Contreras; Margaret Martonosi; Jinzhang Peng; Guei-Yuan Lueh; Roy Ju (ACM Trans. Embed. Comput. Syst., 2007)

Multi-core scalability-impacting compiler optimizations. - Dinesh C. Suresh; Roy Ju; Michael Lai; Mei Ye (Comput. Sci. Res. Dev., 2010)

Support of Probabilistic Pointer Analysis in the SSA Form. - Ming-Yu Hung; Peng-Sheng Chen; Yuan-Shin Hwang; Roy Dz-Ching Ju; Jenq Kuen Lee (IEEE Trans. Parallel Distributed Syst., 2012)

Guest Editorial: Embedded Multicore Systems and Applications. - Jenq Kuen Lee; Albert Cohen 001; Roy Ju; Kuan-Ching Li (J. Signal Process. Syst., 2015)