A TMR Scheme for SEU Mitigation in Scan Flip-Flops. - Roystein Oliveira; Aditya Jagirdar; Tapan J. Chakraborty (ISQED, 2007)

A Robust Architecture for Flip-Flops Tolerant to Soft-Errors and Transients from Combinational Circuits. - Aditya Jagirdar; Roystein Oliveira; Tapan J. Chakraborty (VLSI Design, 2008)