Implementation of (Normalised) RLS Lattice on Virtex. - Felix Albu; Jiri Kadlec; Christopher I. Softley; Rudolf Matousek; Antonin Hermanek; Nick Coleman; Anthony D. Fagan (FPL, 2001)

Logarithmic Number System and Floating-Point Arithmetics on FPGA. - Rudolf Matousek; Milan Tichý; Zdenek Pohl; Jiri Kadlec; Christopher I. Softley; Nick Coleman (FPL, 2002)

Lattice adaptive filter implementation for FPGA. - Zdenek Pohl; Rudolf Matousek; Jiri Kadlec; Milan Tichý; Miroslav Lícko (FPGA, 2003)

Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping. - Zdenek Pohl; Jan Schier; Miroslav Lícko; Antonin Hermanek; Milan Tichý; Rudolf Matousek; Jiri Kadlec (IPDPS, 2003)

Dynamic reconfiguration in FPGA-based SoC designs (abstract only). - Roman Bartosinski; Martin Danek; Petr Honzík; Rudolf Matousek (FPGA, 2005)

VPart: an automatic partitioning tool for dynamic reconfiguration (abstract only). - Leos Kafka; Rafal Kielbik; Rudolf Matousek; Juan Manuel Moreno (FPGA, 2005)

The European Logarithmic Microprocesor. - John N. Coleman; Christopher I. Softley; Jiri Kadlec; Rudolf Matousek; Milan Tichý; Zdenek Pohl; Antonin Hermanek; Nico F. Benschop (IEEE Trans. Computers, 2008)