The design of a latency constrained, power optimized NoC for a 4G SoC. - Rudy Beraha; Isask'har Walter; Israel Cidon; Avinoam Kolodny (NOCS, 2009)

Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study. - Rudy Beraha; Isask'har Walter; Israel Cidon; Avinoam Kolodny (DATE, 2010)

Latency-Constrained, Power-Optimized NoC Design for a 4G SoC: A Case Study. - Rudy Beraha; Isask'har Walter; Israel Cidon; Avinoam Kolodny (Low Power Networks-on-Chip, 2011)

Minimizing clock domain crossing in Network on Chip interconnect. - Parag Kulkarni; Puneet Gupta 001; Rudy Beraha (ISQED, 2014)

Blackghost: An ultra-low-power all-in-one 28nm CMOS SoC for Internet-of-Things. - Yu Pu; Giby Samson; Chunlei Shi; Dongkyu Park; Ken Easton; Rudy Beraha; J. Hadi; Mark Lin; E. Arvelo; J. Fatehi; J. Kumar; Moses Derkalousdian; et al. (COOL Chips, 2017)

A 9-mm2 Ultra-Low-Power Highly Integrated 28-nm CMOS SoC for Internet of Things. - Yu Pu; Chunlei Shi; Giby Samson; Dongkyu Park; Ken Easton; Rudy Beraha; Adam Newham; Mark Lin; Venkat Rangan; Karam Chatha; Danny Butterfield; Rashid Attar (IEEE J. Solid State Circuits, 2018)