Rui Wu
Orcid: 0000-0001-7804-7691Affiliations:
- Tokyo Institute of Technology, Tokyo, Japan
According to our database1,
Rui Wu
authored at least 39 papers
between 2014 and 2022.
Collaborative distances:
Collaborative distances:
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on orcid.org
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Bibliography
2022
A Ka-Band SATCOM Transceiver in 65-nm CMOS With High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Terminal.
IEEE J. Solid State Circuits, 2022
A 0.37mm<sup>2</sup> Fully-Integrated Wide Dynamic Range Sub-GHz Receiver Front-End without Off-Chip Matching Components.
IEICE Trans. Electron., 2022
A Highly Linearized Ka-band Heterodyne Receiver using a Folded Class-AB Inductive Peaking Mixer and Magnetic-Self-Cancellation-Transformer-Based IF Amplifiers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
A 0.85mm<sup>2</sup> BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry With T/R Switch.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A CMOS Dual-Polarized Phased-Array Beamformer Utilizing Cross-Polarization Leakage Cancellation for 5G MIMO Systems.
IEEE J. Solid State Circuits, 2021
An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
A 35-GHz TX and RX Front End With High TX Output Power for Ka-Band FMCW Phased-Array Radar Transceivers in CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst., 2020
A 39-GHz 64-Element Phased-Array Transceiver With Built-In Phase and Amplitude Calibrations for Large-Array 5G NR in 65-nm CMOS.
IEEE J. Solid State Circuits, 2020
A 28-GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR.
IEEE J. Solid State Circuits, 2020
A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage Cancellation.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020
2019
A 60-GHz 3.0-Gb/s Spectrum Efficient BPOOK Transceiver for Low-Power Short-Range Wireless in 65-nm CMOS.
IEEE J. Solid State Circuits, 2019
A 28-GHz CMOS Phased-Array Transceiver Based on LO Phase-Shifting Architecture With Gain Invariant Phase Tuning for 5G New Radio.
IEEE J. Solid State Circuits, 2019
A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance.
IEEE J. Solid State Circuits, 2019
A 265- $\mu$ W Fractional- ${N}$ Digital PLL With Seamless Automatic Switching Sub-Sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65-nm CMOS.
IEEE J. Solid State Circuits, 2019
IEICE Trans. Electron., 2019
A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator based Frequency Synthesizer and Digital Background EVM Calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
A DPLL-Centric Bluetooth Low-Energy Transceiver With a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65-nm CMOS.
IEEE J. Solid State Circuits, 2018
A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS.
IEICE Trans. Electron., 2018
An ADPLL-centric bluetooth low-energy transceiver with 2.3mW interference-tolerant hybrid-loop receiver and 2.9mW single-point polar transmitter in 65nm CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A 0.85mm<sup>2</sup> BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
2017
IEEE J. Solid State Circuits, 2017
IEICE Trans. Electron., 2017
24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
A 0.0055mm<sup>2</sup> 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI.
IEICE Trans. Electron., 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016
2015
A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections.
IEICE Trans. Electron., 2015
A fully synthesizable injection-locked PLL with feedback current output DAC in 28 nm FDSOI.
IEICE Electron. Express, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Substrate noise isolation improvement by helium-3 ion irradiation technique in a triple-well CMOS process.
Proceedings of the 45th European Solid State Device Research Conference, 2015
2014
A Variable-Supply-Voltage 60-GHz PA with Consideration of HCI Issues for TDD Operation.
IEICE Trans. Electron., 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A 0.015-mm<sup>2</sup> 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
A 0.011 mm<sup>2</sup> PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014