Flip-Flop and Repeater Insertion for Early Interconnect Planning. - Ruibing Lu; Guoan Zhong; Cheng-Kok Koh; Kai-Yuan Chao (DATE, 2002)

Interconnect Planning with Local Area Constrained Retiming. - Ruibing Lu; Cheng-Kok Koh (DATE, 2003)

SAMBA-Bus: A High Performance Bus Architecture for System-on-Chips. - Ruibing Lu; Cheng-Kok Koh (ICCAD, 2003)

Performance Optimization of Latency Insensitive Systems Through Buffer Queue Sizing of Communication Channels. - Ruibing Lu; Cheng-Kok Koh (ICCAD, 2003)

A high performance bus communication architecture through bus splitting. - Ruibing Lu; Cheng-Kok Koh (ASP-DAC, 2004)

Post-layout logic duplication for synthesis of domino circuits with complex gates. - Aiqun Cao; Ruibing Lu; Cheng-Kok Koh (ASP-DAC, 2005)

Improving the scalability of SAMBA bus architecture. - Ruibing Lu; Aiqun Cao; Cheng-Kok Koh (ASP-DAC, 2005)

Performance analysis of latency-insensitive systems. - Ruibing Lu; Cheng-Kok Koh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Postlayout optimization for synthesis of Domino circuits. - Aiqun Cao; Ruibing Lu; Chen Li 004; Cheng-Kok Koh (ACM Trans. Design Autom. Electr. Syst., 2006)

SAMBA-Bus: A High Performance Bus Architecture for System-on-Chips. - Ruibing Lu; Aiqun Cao; Cheng-Kok Koh (IEEE Trans. Very Large Scale Integr. Syst., 2007)