HECTOR: A Multi-Level Intermediate Representation for Hardware Synthesis Methodologies. - Ruifan Xu; Youwei Xiao; Jin Luo; Yun Liang 001 (ICCAD, 2022)

Hermes: Enhancing Extensibility in High-Level Synthesis through Multi-Level IRs. - Ruifan Xu; Jin Luo; Yun Liang 001 (FPGA, 2024)

Hestia: An Efficient Cross-Level Debugger for High-Level Synthesis. - Ruifan Xu; Jin Luo; Yawen Zhang; Yibo Lin; Runsheng Wang; Ru Huang 001; Yun Liang 001 (MICRO, 2024)

Triton-distributed: Programming Overlapping Kernels on Distributed AI Systems with the Triton Compiler. - Size Zheng 001; Wenlei Bao; Qi Hou; Xuegui Zheng; Jin Fang; Chenhui Huang; Tianqi Li; Haojie Duanmu; Renze Chen; Ruifan Xu; Yifan Guo; Ningxin Zheng; et al. (CoRR, 2025)