A 5.4-GHz reference-sampling PLL-sub-sampling DLL cascaded frequency synthesizer achieving 85.7-fs RMS jitter in 65-nm CMOS. - Ruixi Yu; Hongyu Ren; Li Wang; Yunbo Huang; Zunsong Yang; Xuan Guo 003; Xiaoyu Shan; Kai Cheng; Bo Li (Microelectron. J., 2026)