An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications. - Meenali Janveja; Rushik Parmar; Gaurav Trivedi; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices. - Rushik Parmar; Meenali Janveja; Gaurav Trivedi; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices. - Meenali Janveja; Rushik Parmar; Mayank Tantuway; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Programmable Binary Weighted Time-Domain Vector Matrix Multiplier for In-Memory Computing. - Bipul Boro; Ashvinikumar Dongre; Rushik Parmar; Gaurav Trivedi (APCCAS, 2023)

MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications. - Meenali Janveja; Rushik Parmar; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices. - Rushik Parmar; Meenali Janveja; Jan Pidanic; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Reprogrammable Time-Domain RRAM Based Vector Matrix Multiplier for In-Memory Computing. - Bipul Boro; Rushik Parmar; Ashvinikumar Dongre; Gaurav Trivedi (ISQED, 2024)

An SNN-Inspired Area- and Power-Efficient VLSI Architecture of Myocardial Infarction Classifier for Wearable Devices. - Rushik Parmar; Khushil Yadav; Gauraangi Anand; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Low-Power Co-Processor to Predict Ventricular Arrhythmia for Wearable Healthcare Devices. - Meenali Janveja; Rushik Parmar; Srichandan Dash; Jan Pidanic; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2024)