SET logic driving capability and its enhancement in 3-D integrated SET-CMOS circuit. - Rutu Parekh; Jacques Beauvais; Dominique Drouin (Microelectron. J., 2014)

Design and Optimization of Single Electron Transistor Based 4-Bit Arithmetic and Logic Unit at Room Temperature Operation. - Rathin K. Joshi; Rutu Parekh; Yash Agrawal (iNIS, 2017)

Design of prominent SET-based high performance computing system. - Rashmit Patel; Yash Agrawal; Rutu Parekh (IET Circuits Devices Syst., 2020)

Assessment of Emerging Graphene based Network-on-chip for Integrated Circuit Design. - Yatin Kumar Gupta; Yash Agrawal; Rutu Parekh; Bakul Gohel (VDAT, 2021)

CNTFET Based Low Power Repeaters for On-Chip Interconnect System. - Takshashila Pathade; Yash Agrawal; Rutu Parekh; Girish Kumar Mekala (VDAT, 2021)

Realtime soldier's health monitoring system incorporating low power LoRa communication. - Bhargav Jethwa; Milit Panchasara; Abhi Zanzarukiya; Rutu Parekh (Int. J. Sens. Networks, 2021)