A Programmable Hyper-Dimensional Processor Architecture for Human-Centric IoT. - Sohum Datta; Ryan Albert G. Antonio; Aldrin R. S. Ison; Jan M. Rabaey (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

Bit-Selection Control for Energy-Efficient Handwritten Digits Recognition Hyperdimensional Computing Architecture. - Ryan Albert G. Antonio; Anastacia B. Alvarez (TENCON, 2020)

Redundancy Pruning for Binary Hyperdimensional Computing Architectures. - Ryan Albert G. Antonio; Anastacia B. Alvarez (ISCAS, 2022)

Energy-Efficient Sparse Hyperdimensional Computing for Speech Recognition. - Kim Isaac I. Buelagala; Ginzy S. Javier; Sean Alfred A. Lipardo; James Carlo E. Sorsona; Sherry Joy Alvionne S. Baquiran; Lawrence Roman A. Quizon; Allen Jason Tan; Ryan Albert G. Antonio; Fredrick Angelo R. Galapon; Anastacia B. Alvarez (ISOCC, 2023)

Integration of In-Memory Computing Capabilities to a Self-Matching Complementary-Reference Sensing Scheme for TST-MRAM. - Giussepe Yvanric Galvez; Andrew James Lim; Christopher Jr Camarillo; John Rey Marturillas; Mark Emannuel Teodoro; Ellris Kristian Nuel Urfano; Anastacia B. Alvarez; Ryan Albert G. Antonio; Fredrick Angelo R. Galapon; Sherry Joy Alvionne Baquiran; Allen Jason Tan; Lawrence Roman A. Quizon (ISOCC, 2023)