An Improved Hardware Architecture for modulo without Multiplication. - Ryan Swann; James E. Stine (MWSCAS, 2020)

A Reconfigurable Architecture for Improvement and Optimization of Advanced Encryption Standard Hardware. - Ryan Swann; James E. Stine (ACSCC, 2021)

Parallelization of the Shift and Add Reducer. - Ryan Swann; James E. Stine (ACSSC, 2023)

Evaluation of a Modular Approach to AES Hardware Architecture and Optimization. - Ryan Swann; James E. Stine (J. Signal Process. Syst., 2023)

Seer: Predictive Runtime Kernel Selection for Irregular Problems. - Ryan Swann; Muhammad Osama; Karthik Sangaiah; Jalal Mahmud (CGO, 2024)

Alchemy : A Methodology for Scalable RTL Design Space Exploration. - Ryan Swann; James E. Stine (ACM Great Lakes Symposium on VLSI, 2025)