Dynamically shift-switched dataline redundancy suitable for DRAM macro with wide data bus. - Toshimasa Namekawa; Shinji Miyano; Ryo Fukuda; Ryo Haga; Osamu Wada; Hironori Banba; Satoru Takeda; Kazuhiro Suda; Kenichiro Mimoto; Satoshi Yamaguchi; Tsutomu Ohkubo; Hiroshi Takato; et al. (IEEE J. Solid State Circuits, 2000)

Logarithmic Curvature and Torsion Graphs. - Norimasa Yoshida; Ryo Fukuda; Takafumi Saito (MMCS, 2008)

A 1.6GB/s DDR2 128Mb chain FeRAM with scalable octal bitline and sensing schemes. - Hidehiro Shiga; Daisaburo Takashima; Shinichiro Shiratake; Katsuhiko Hoya; Tadashi Miyakawa; Ryu Ogiwara; Ryo Fukuda; Ryosuke Takizawa; Kosuke Hatsuda; Fumiyoshi Matsuoka; Yasushi Nagadomi; Daisuke Hashimoto; et al. (ISSCC, 2009)

Log-aesthetic space curve segments. - Norimasa Yoshida; Ryo Fukuda; Takafumi Saito (Symposium on Solid and Physical Modeling, 2009)

A scalable shield-bitline-overdrive technique for 1.3V Chain FeRAM. - Daisaburo Takashima; Hidehiro Shiga; Daisuke Hashimoto; Tadashi Miyakawa; Shinichiro Shiratake; Katsuhiko Hoya; Ryu Ogiwara; Ryosuke Takizawa; Ryosuke Doumae; Ryo Fukuda; Yohji Watanabe; Shuso Fujii; et al. (ISSCC, 2010)

A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes. - Hidehiro Shiga; Daisaburo Takashima; Shinichiro Shiratake; Katsuhiko Hoya; Tadashi Miyakawa; Ryu Ogiwara; Ryo Fukuda; Ryosuke Takizawa; Kosuke Hatsuda; Fumiyoshi Matsuoka; Yasushi Nagadomi; Daisuke Hashimoto; et al. (IEEE J. Solid State Circuits, 2010)

Practice and Evaluation with Planetary Simulator in Junior High School Science Classes. - Ryo Fukuda; Mariko Suzuki; Kazuhiko Sawada; Masato Soga (ICCE, 2011)

A Scalable Shield-Bitline-Overdrive Technique for Sub-1.5 V Chain FeRAMs. - Daisaburo Takashima; Hidehiro Shiga; Daisuke Hashimoto; Tadashi Miyakawa; Shinichiro Shiratake; Katsuhiko Hoya; Ryu Ogiwara; Ryosuke Takizawa; Ryosuke Doumae; Ryo Fukuda; Yohji Watanabe; Shuso Fujii; et al. (IEEE J. Solid State Circuits, 2011)

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology. - Hiroshi Maejima; Kazushige Kanda; Susumu Fujimura; Teruo Takagiwa; Susumu Ozawa; Jumpei Sato; Yoshihiko Shindo; Manabu Sato; Naoaki Kanagawa; Junji Musha; Satoshi Inoue; Katsuaki Sakurai; et al. (ISSCC, 2018)

A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology. - Noboru Shibata; Kazushige Kanda; Takahiro Shimizu; Jun Nakai; Osamu Nagao; Naoki Kobayashi 004; Makoto Miakashi; Yasushi Nagadomi; Takeshi Nakano; Takahisa Kawabe; Taira Shibuya; Mario Sako; et al. (ISSCC, 2019)

A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology. - Chang Hua Siau; Kwang-Ho Kim; Seungpil Lee; Katsuaki Isobe; Noboru Shibata; Kapil Verma; Takuya Ariki; Jason Li 001; Jong Yuh; Anirudh Amarnath; Qui Nguyen; Ohwon Kwon; et al. (ISSCC, 2019)

NAIST's Machine Translation Systems for IWSLT 2020 Conversational Speech Translation Task. - Ryo Fukuda; Katsuhito Sudoh; Satoshi Nakamura 001 (IWSLT, 2020)

A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology. - Noboru Shibata; Takahisa Kawabe; Taira Shibuya; Mario Sako; Kosuke Yanagidaira; Toshifumi Hashimoto; Hiroki Date; Manabu Sato; Tomoki Nakagawa; Junji Musha; Takatoshi Minamoto; Kazushige Kanda; et al. (IEEE J. Solid State Circuits, 2020)

30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology. - Tsutomu Higuchi; Takuyo Kodama; Koji Kato; Ryo Fukuda; Naoya Tokiwa; Mitsuhiro Abe; Teruo Takagiwa; Yuki Shimizu; Junji Musha; Katsuaki Sakurai; Jumpei Sato; Tetsuaki Utsumi; et al. (ISSCC, 2021)

NAIST English-to-Japanese Simultaneous Translation System for IWSLT 2021 Simultaneous Text-to-text Task. - Ryo Fukuda; Yui Oka; Yasumasa Kano; Yuki Yano; Yuka Ko; Hirotaka Tokuyama; Kosuke Doi; Sakriani Sakti; Katsuhito Sudoh; Satoshi Nakamura 001 (IWSLT, 2021)

On Knowledge Distillation for Translating Erroneous Speech Transcriptions. - Ryo Fukuda; Katsuhito Sudoh; Satoshi Nakamura 001 (IWSLT, 2021)

Simultaneous Speech-to-Speech Translation System with Transformer-Based Incremental ASR, MT, and TTS. - Ryo Fukuda; Sashi Novitasari; Yui Oka; Yasumasa Kano; Yuki Yano; Yuka Ko; Hirotaka Tokuyama; Kosuke Doi; Tomoya Yanagita; Sakriani Sakti; Katsuhito Sudoh; Satoshi Nakamura 001 (O-COCOSDA, 2021)

A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs. - Toshiyuki Kouchi; Mami Kakoi; Noriyasu Kumazaki; Akio Sugahara; Akihiro Imamoto; Yasufumi Kajiyama; Yuri Terada; Sanad Bushnaq; Naoaki Kanagawa; Takuyo Kodama; Ryo Fukuda; Hiromitsu Komai; et al. (IEEE J. Solid State Circuits, 2021)

Speech Segmentation Optimization using Segmented Bilingual Speech Corpus for End-to-end Speech Translation. - Ryo Fukuda; Katsuhito Sudoh; Satoshi Nakamura 001 (INTERSPEECH, 2022)

A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory With a 2.4-Gb/s I/O Speed Interface. - Jong Yuh; Jason Li 001; Heguang Li; Yoshihiro Oyama; Cynthia Hsu; Pradeep Anantula; Stanley Jeong; Anirudh Amarnath; Siddhesh Darne; Sneha Bhatia; Tianyu Tang; Aditya Arya; et al. (ISSCC, 2022)

NAIST Simultaneous Speech-to-Text Translation System for IWSLT 2022. - Ryo Fukuda; Yuka Ko; Yasumasa Kano; Kosuke Doi; Hirotaka Tokuyama; Sakriani Sakti; Katsuhito Sudoh; Satoshi Nakamura 001 (IWSLT@ACL, 2022)

NAIST Simultaneous Speech-to-speech Translation System for IWSLT 2023. - Ryo Fukuda; Yuta Nishikawa; Yasumasa Kano; Yuka Ko; Tomoya Yanagita; Kosuke Doi; Mana Makinae; Sakriani Sakti; Katsuhito Sudoh; Satoshi Nakamura 001 (IWSLT@ACL, 2023)

Tagged End-to-End Simultaneous Speech Translation Training Using Simultaneous Interpretation Data. - Yuka Ko; Ryo Fukuda; Yuta Nishikawa; Yasumasa Kano; Katsuhito Sudoh; Satoshi Nakamura 001 (IWSLT@ACL, 2023)

NAIST-SIC-Aligned: Automatically-Aligned English-Japanese Simultaneous Interpretation Corpus. - Jinming Zhao; Yuka Ko; Kosuke Doi; Ryo Fukuda; Katsuhito Sudoh; Satoshi Nakamura 001 (CoRR, 2023)

A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface. - Jonghak Yuh; Yen-Lung Jason Li; Heguang Li; Yoshihiro Oyama; Cynthia Hsu; Pradeep Anantula; Gwang Yeong Stanley Jeong; Anirudh Amarnath; Siddhesh Darne; Sneha Bhatia; Tianyu Tang; Aditya Arya; et al. (IEEE J. Solid State Circuits, 2023)

NAIST-SIC-Aligned: An Aligned English-Japanese Simultaneous Interpretation Corpus. - Jinming Zhao; Katsuhito Sudoh; Satoshi Nakamura 001; Yuka Ko; Kosuke Doi; Ryo Fukuda (LREC/COLING, 2024)

NTTSU at WMT2024 General Translation Task. - Minato Kondo; Ryo Fukuda; Xiaotian Wang; Katsuki Chousa; Masato Nishimura; Kosei Buma; Takatomo Kano; Takehito Utsuro (WMT, 2024)

NAIST Simultaneous Speech Translation System for IWSLT 2024. - Yuka Ko; Ryo Fukuda; Yuta Nishikawa; Yasumasa Kano; Tomoya Yanagita; Kosuke Doi; Mana Makinae; Haotian Tan; Makoto Sakai; Sakriani Sakti; Katsuhito Sudoh; Satoshi Nakamura 001 (CoRR, 2024)

Improving Speech Translation Accuracy and Time Efficiency With Fine-Tuned wav2vec 2.0-Based Speech Segmentation. - Ryo Fukuda; Katsuhito Sudoh; Satoshi Nakamura 001 (IEEE ACM Trans. Audio Speech Lang. Process., 2024)

Speech Emotion Recognition Based on Large-Scale Automatic Speech Recognizer. - Ryo Fukuda; Takatomo Kano; Atsushi Ando; Atsunori Ogawa (ICASSP, 2025)

Bridging Speech and Text Foundation Models with ReShape Attention. - Takatomo Kano; Atsunori Ogawa; Marc Delcroix; William Chen; Ryo Fukuda; Kohei Matsuura; Takanori Ashihara; Shinji Watanabe 001 (ICASSP, 2025)