A 60-GHz phase-locked loop with inductor-less prescaler in 90-nm CMOS. - Hiroaki Hoshino; Ryoichi Tachibana; Toshiya Mitomo; Naoko Ono; Yoshiaki Yoshihara; Ryuichi Fujimoto (ESSCIRC, 2007)

A 60-GHz CMOS Receiver Front-End With Frequency Synthesizer. - Toshiya Mitomo; Ryuichi Fujimoto; Naoko Ono; Ryoichi Tachibana; Hiroaki Hoshino; Yoshiaki Yoshihara; Yukako Tsutsumi; Ichiro Seto (IEEE J. Solid State Circuits, 2008)

A 60-GHz Phase-Locked Loop with Inductor-Less Wide Operation Range Prescaler in 90-nm CMOS. - Hiroaki Hoshino; Ryoichi Tachibana; Toshiya Mitomo; Naoko Ono; Yoshiaki Yoshihara; Ryuichi Fujimoto (IEICE Trans. Electron., 2009)

A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication. - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (ISSCC, 2012)

A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication. - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (IEEE J. Solid State Circuits, 2012)

Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication". - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (IEEE J. Solid State Circuits, 2013)

20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. - Shigehito Saigusa; Toshiya Mitomo; Hidenori Okuni; Masahiro Hosoya; Akihide Sai; Shusuke Kawai; Tong Wang 018; Masanori Furuta; Kei Shiraishi; Koichiro Ban; Seiichiro Horikawa; Tomoya Tandai; et al. (ISSCC, 2014)

An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. - Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Yutaka Shimizu; Mitsuyuki Ashida; Asuka Maki; Tomohiko Takeuchi; Hiroyuki Kobayashi; Go Urakawa; Hiroaki Hoshino; Shigehito Saigusa; Kazushi Koyama; et al. (ISSCC, 2018)

A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology. - Noboru Shibata; Kazushige Kanda; Takahiro Shimizu; Jun Nakai; Osamu Nagao; Naoki Kobayashi 004; Makoto Miakashi; Yasushi Nagadomi; Takeshi Nakano; Takahisa Kawabe; Taira Shibuya; Mario Sako; et al. (ISSCC, 2019)

A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology. - Noboru Shibata; Takahisa Kawabe; Taira Shibuya; Mario Sako; Kosuke Yanagidaira; Toshifumi Hashimoto; Hiroki Date; Manabu Sato; Tomoki Nakagawa; Junji Musha; Takatoshi Minamoto; Kazushige Kanda; et al. (IEEE J. Solid State Circuits, 2020)

30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology. - Tsutomu Higuchi; Takuyo Kodama; Koji Kato; Ryo Fukuda; Naoya Tokiwa; Mitsuhiro Abe; Teruo Takagiwa; Yuki Shimizu; Junji Musha; Katsuaki Sakurai; Jumpei Sato; Tetsuaki Utsumi; et al. (ISSCC, 2021)